On 6/7/23 12:05, Charles Keepax wrote: > On Wed, Jun 07, 2023 at 05:22:45PM +0100, Mark Brown wrote: >> On Wed, Jun 07, 2023 at 10:10:24AM -0500, Pierre-Louis Bossart wrote: >>> On 6/7/23 04:29, Richard Fitzgerald wrote: >>>> On 07/06/2023 04:12, Bard Liao wrote: >> >>>> You are declaring that all the CPU and CODEC in the dailink behave as a >>>> single logical link. So you can just connect all CPUs to all CODECS. >> >>>> That also fixes a problem with the existing N CPU to N CODEC mapping. It >>>> assumes that means CPU0 is connected to CODEC0, CPU1 is connected to >>>> CODEC1, ... But that isn't necessarily true. You could have an N:N >>>> mapping where multiple CPUs have been combined to create a multi-channel >>>> stream that is sent to all CODECs. >> >>> This is questionable when the CPUs are connected to different links. >>> SoundWire is not a giant switch matrix, there's a clear parent-child >>> dependency and limited scope. >> >>> Example topology for a 2 link/4 amplifier solution. >> >> Or a system with two distinct I2S DAIs (TDM is another thing). > > I guess the bit that slightly phases me here is, historically a > DAI link has been the thing that specifies what is connected to > what. What kinda happened when we added multi-cpu is we bent > that assumption, at least for the N -> N case, and now even > more so for the N -> M case, where only a subset of the DAI link > is actually connected. > > If your system looks like: > > CPU A -> CODEC A > CPU B -> CODEC B > > What makes this a single DAI link, rather than 2 DAI links? And > does the information within the DAI link about what is connected > to what not just start looking like DAI links? Synchronized starts/operation is the big difference IMHO. There's one TRIGGER_START, not two.
