On 6/7/23 08:07, Vinod Koul wrote: > > Hi Pierre, > > On 02-06-23, 15:46, Pierre-Louis Bossart wrote: >> On 5/27/23 05:36, Vinod Koul wrote: >>> On 15-05-23, 15:10, Bard Liao wrote: >>>> This series uses the abstraction added in past kernel cycles to provide >>>> support for the ACE2.x integration. The existing SHIM and Cadence >>>> registers are now split in 3 (SHIM, IP, SHIM vendor-specific), with some >>>> parts also moved to the HDaudio Extended Multi link structures. Nothing >>>> fundamentally different except for the register map. >>>> >>>> This series only provides the basic mechanisms to expose SoundWire-based >>>> DAIs. The PCI parts and DSP management will be contributed later, and the >>>> DAI ops are now empty as well. >>>> >>>> The change is mainly on SoundWire. It would be better to go through >>>> SoundWire tree. >>> >>> Applied, thanks >> >> Hi Vinod, is there a way you could provide an immutable tag for Mark >> Brown, the patch1 in this set is required for my next set of ASoC >> LunarLake patches? > > Unfortunately, I have picked the whole series into next. If I was aware > I would have pushed them to a topic. > > Mark can pull sdw/next but that would bring other things as well which > may not be preferred. I guess next best would be wait few weeks (rc1) Yeah, it's a miss on my side, I forgot about this one-line enum dependency for DMIC/SSP. SoundWire has more dependencies so we expected to send the relevant patches in the next cycle. DMIC/SSP is quite simple and could have been part of 6.5. Oh well. >> "ASoC: SOF: Intel: shim: add enum for ACE 2.0 IP used in LunarLake" adds >> the SOF_INTEL_ACE_2_0 definition to select different ops for LunarLake. >> >> Thank you >> -Pierre >
