On 06/06/23 20:19, Pierre-Louis Bossart wrote:
>> static void acp63_disable_interrupts(void __iomem *acp_base)
>> @@ -102,23 +103,60 @@ static irqreturn_t acp63_irq_handler(int irq, void *dev_id)
>> {
>> struct acp63_dev_data *adata;
>> struct pdm_dev_data *ps_pdm_data;
>> - u32 val;
>> + struct amd_sdw_manager *amd_manager;
>> + u32 ext_intr_stat, ext_intr_stat1;
>> + u16 irq_flag = 0;
>> u16 pdev_index;
>>
>> adata = dev_id;
>> if (!adata)
>> return IRQ_NONE;
>> + /* ACP interrupts will be cleared by reading particular bit and writing
>> + * same value to the status register. writing zero's doesn't have any
>> + * effect.
>> + * Bit by bit checking of IRQ field is implemented.
>> + */
>> + ext_intr_stat = readl(adata->acp63_base + ACP_EXTERNAL_INTR_STAT);
>> + if (ext_intr_stat & ACP_SDW0_STAT) {
>> + writel(ACP_SDW0_STAT, adata->acp63_base + ACP_EXTERNAL_INTR_STAT);
>> + pdev_index = adata->sdw0_dev_index;
>> + amd_manager = dev_get_drvdata(&adata->pdev[pdev_index]->dev);
>> + if (amd_manager)
> can this test be false?
No, this test won't be false.
It's only extra NULL check before scheduling work queue.
>
>> + schedule_work(&amd_manager->amd_sdw_irq_thread);
>> + irq_flag = 1;
>> + }
>>
>> - val = readl(adata->acp63_base + ACP_EXTERNAL_INTR_STAT);
>> - if (val & BIT(PDM_DMA_STAT)) {
>> + ext_intr_stat1 = readl(adata->acp63_base + ACP_EXTERNAL_INTR_STAT1);
>> + if (ext_intr_stat1 & ACP_SDW1_STAT) {
>> + writel(ACP_SDW1_STAT, adata->acp63_base + ACP_EXTERNAL_INTR_STAT1);
>> + pdev_index = adata->sdw1_dev_index;
>> + amd_manager = dev_get_drvdata(&adata->pdev[pdev_index]->dev);
>> + if (amd_manager)
> can this be false?
No, this test won't be false.
It's only extra NULL check before scheduling work queue.
>
>> + schedule_work(&amd_manager->amd_sdw_irq_thread);
>> + irq_flag = 1;
>> + }
>> +
>> + if (ext_intr_stat & ACP_ERROR_IRQ) {
>> + writel(ACP_ERROR_IRQ, adata->acp63_base + ACP_EXTERNAL_INTR_STAT);
>> + /* TODO: Report SoundWire Manager instance errors */
>> + writel(0, adata->acp63_base + ACP_SW0_I2S_ERROR_REASON);
>> + writel(0, adata->acp63_base + ACP_SW1_I2S_ERROR_REASON);
>> + writel(0, adata->acp63_base + ACP_ERROR_STATUS);
>> + irq_flag = 1;
>> + }
>> +
>> + if (ext_intr_stat & BIT(PDM_DMA_STAT)) {
>> pdev_index = adata->pdm_dev_index;
>> ps_pdm_data = dev_get_drvdata(&adata->pdev[pdev_index]->dev);
>> writel(BIT(PDM_DMA_STAT), adata->acp63_base + ACP_EXTERNAL_INTR_STAT);
>> if (ps_pdm_data->capture_stream)
>> snd_pcm_period_elapsed(ps_pdm_data->capture_stream);
>> - return IRQ_HANDLED;
>> + irq_flag = 1;
>> }
>> - return IRQ_NONE;
>> + if (irq_flag)
>> + return IRQ_HANDLED;
>> + else
>> + return IRQ_NONE;
>> }
>>
>> static int sdw_amd_scan_controller(struct device *dev)
