On 2023/6/5 15:36, Takashi Iwai wrote:
On Wed, 31 May 2023 05:21:33 +0200,
Yanteng Si wrote:
On loongson controller, after calling snd_hdac_stream_updateb()
to enable DMA engine, the SDnCTL.STRM will become to zero. We
need to access SDnCTL in dword to keep SDnCTL.STRM is not changed.
Signed-off-by: Yanteng Si<siyanteng@xxxxxxxxxxx>
Signed-off-by: Yingkun Meng<mengyingkun@xxxxxxxxxxx>
---
sound/hda/hdac_stream.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/sound/hda/hdac_stream.c b/sound/hda/hdac_stream.c
index 1f56fd33b9af..90fbf9fea2b3 100644
--- a/sound/hda/hdac_stream.c
+++ b/sound/hda/hdac_stream.c
@@ -13,6 +13,7 @@
#include <sound/hdaudio.h>
#include <sound/hda_register.h>
#include "trace.h"
+#include "../pci/hda/hda_controller.h"
/*
* the hdac_stream library is intended to be used with the following
@@ -130,6 +131,7 @@ EXPORT_SYMBOL_GPL(snd_hdac_stream_init);
void snd_hdac_stream_start(struct hdac_stream *azx_dev)
{
struct hdac_bus *bus = azx_dev->bus;
+ struct azx *chip = bus_to_azx(bus);
int stripe_ctl;
trace_snd_hdac_stream_start(bus, azx_dev);
@@ -150,7 +152,11 @@ void snd_hdac_stream_start(struct hdac_stream *azx_dev)
stripe_ctl);
}
/* set DMA start and interrupt mask */
- snd_hdac_stream_updateb(azx_dev, SD_CTL,
+ if (chip->driver_caps & AZX_DCAPS_LOONGSON_WORKAROUND)
+ snd_hdac_stream_updatel(azx_dev, SD_CTL,
+ 0, SD_CTL_DMA_START | SD_INT_MASK);
+ else
+ snd_hdac_stream_updateb(azx_dev, SD_CTL,
0, SD_CTL_DMA_START | SD_INT_MASK);
Similarly like the patch 2, this has to be handled with a new flag
added to struct hdac_bus.
Okay, I'll do it right now.
Thanks,
Yanteng
Takashi
