>>> + if (ext_intr_stat & BIT(ACP_ERROR_IRQ_MASK)) { >>> + writel(BIT(ACP_ERROR_IRQ_MASK), adata->acp63_base + ACP_EXTERNAL_INTR_STAT); >>> + writel(0, adata->acp63_base + ACP_SW0_I2S_ERROR_REASON); >>> + writel(0, adata->acp63_base + ACP_SW1_I2S_ERROR_REASON); >>> + writel(0, adata->acp63_base + ACP_ERROR_STATUS); >>> + irq_flag = 1; >> it's not clear what this does? Looks like just filtering out interrupts >> without doing anything about the interrupt source? > When ACP error interrupt is raised, As per our design, ACP IRQ handler will clear > the error interrupt by clearing ACP_ERROR_IRQ bit in ACP_EXTERNAL_INTR_STAT. > > To know the error source reason, we need to read the ACP_ERROR_STATUS, > ACP_SW0_I2S_ERROR_REASON, ACP_SW1_I2S_ERROR_REASON registers. > After reading the Error registers, we need to clear these registers. > Currently, we haven't added read register operations for error reason registers. > This is for debugging purpose only. > > In Current context, we refer ACP_SW0_I2S_ERROR_REASON register to know errors like > Sound Wire Bus clash detections, Command and Response Errors, BRA mode errors, > FIFO underflow/overflow errors detected for SoundWire Manager -0 instance. > Similarly, ACP_SW1_I2S_ERROR_REASON register referred to know errors detected for > SoundWire Manager instance - 1. If you didn't add the code to deal with the errors, a comment would be welcome to clarify that the interrupts are cleared without looking for the root cause. It's hard when reviewing code to understand if there's a miss or something that's intentionally omitted or to be added later.