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- To: <broonie@xxxxxxxxxx>, <lgirdwood@xxxxxxxxx>, <tiwai@xxxxxxxx>, <perex@xxxxxxxx>, <robh+dt@xxxxxxxxxx>, <krzysztof.kozlowski+dt@xxxxxxxxxx>, <matthias.bgg@xxxxxxxxx>, <angelogioacchino.delregno@xxxxxxxxxxxxx>
- Subject: [PATCH v4 7/9] ASoC: mediatek: mt8188: add required clocks
- From: Trevor Wu <trevor.wu@xxxxxxxxxxxx>
- Date: Wed, 10 May 2023 11:55:24 +0800
- Cc: trevor.wu@xxxxxxxxxxxx, alsa-devel@xxxxxxxxxxxxxxxx, linux-mediatek@xxxxxxxxxxxxxxxxxxx, linux-arm-kernel@xxxxxxxxxxxxxxxxxxx, linux-kernel@xxxxxxxxxxxxxxx, devicetree@xxxxxxxxxxxxxxx
- In-reply-to: <20230510035526.18137-1-trevor.wu@mediatek.com>
- References: <20230510035526.18137-1-trevor.wu@mediatek.com>
apll2_d4, apll12_div4, top_a2sys and top_aud_iec are possibly used in the future. To prevent from breaking binding ABI after any mt8188 dts upstream, add these clocks to clock list in advance. Signed-off-by: Trevor Wu <trevor.wu@xxxxxxxxxxxx> --- sound/soc/mediatek/mt8188/mt8188-afe-clk.c | 4 ++++ sound/soc/mediatek/mt8188/mt8188-afe-clk.h | 4 ++++ 2 files changed, 8 insertions(+) diff --git a/sound/soc/mediatek/mt8188/mt8188-afe-clk.c b/sound/soc/mediatek/mt8188/mt8188-afe-clk.c index 02411be93900..4c24d0b9e90d 100644 --- a/sound/soc/mediatek/mt8188/mt8188-afe-clk.c +++ b/sound/soc/mediatek/mt8188/mt8188-afe-clk.c @@ -25,14 +25,18 @@ static const char *aud_clks[MT8188_CLK_NUM] = { /* divider */ [MT8188_CLK_TOP_APLL1_D4] = "apll1_d4", + [MT8188_CLK_TOP_APLL2_D4] = "apll2_d4", [MT8188_CLK_TOP_APLL12_DIV0] = "apll12_div0", [MT8188_CLK_TOP_APLL12_DIV1] = "apll12_div1", [MT8188_CLK_TOP_APLL12_DIV2] = "apll12_div2", [MT8188_CLK_TOP_APLL12_DIV3] = "apll12_div3", + [MT8188_CLK_TOP_APLL12_DIV4] = "apll12_div4", [MT8188_CLK_TOP_APLL12_DIV9] = "apll12_div9", /* mux */ [MT8188_CLK_TOP_A1SYS_HP_SEL] = "top_a1sys_hp", + [MT8188_CLK_TOP_A2SYS_SEL] = "top_a2sys", + [MT8188_CLK_TOP_AUD_IEC_SEL] = "top_aud_iec", [MT8188_CLK_TOP_AUD_INTBUS_SEL] = "top_aud_intbus", [MT8188_CLK_TOP_AUDIO_H_SEL] = "top_audio_h", [MT8188_CLK_TOP_AUDIO_LOCAL_BUS_SEL] = "top_audio_local_bus", diff --git a/sound/soc/mediatek/mt8188/mt8188-afe-clk.h b/sound/soc/mediatek/mt8188/mt8188-afe-clk.h index 04cb476f0bcb..904505d10841 100644 --- a/sound/soc/mediatek/mt8188/mt8188-afe-clk.h +++ b/sound/soc/mediatek/mt8188/mt8188-afe-clk.h @@ -23,13 +23,17 @@ enum { MT8188_CLK_APMIXED_APLL2, /* divider */ MT8188_CLK_TOP_APLL1_D4, + MT8188_CLK_TOP_APLL2_D4, MT8188_CLK_TOP_APLL12_DIV0, MT8188_CLK_TOP_APLL12_DIV1, MT8188_CLK_TOP_APLL12_DIV2, MT8188_CLK_TOP_APLL12_DIV3, + MT8188_CLK_TOP_APLL12_DIV4, MT8188_CLK_TOP_APLL12_DIV9, /* mux */ MT8188_CLK_TOP_A1SYS_HP_SEL, + MT8188_CLK_TOP_A2SYS_SEL, + MT8188_CLK_TOP_AUD_IEC_SEL, MT8188_CLK_TOP_AUD_INTBUS_SEL, MT8188_CLK_TOP_AUDIO_H_SEL, MT8188_CLK_TOP_AUDIO_LOCAL_BUS_SEL, -- 2.18.0
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