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- To: alsa-devel@xxxxxxxxxxxxxxxx, devicetree@xxxxxxxxxxxxxxx, linux-kernel@xxxxxxxxxxxxxxx, lgirdwood@xxxxxxxxx, broonie@xxxxxxxxxx
- Subject: [PATCH 5/9] ASoC: ssm2602: Add workaround for playback with external MCLK
- From: Paweł Anikiel <pan@xxxxxxxxxxxx>
- Date: Fri, 14 Apr 2023 16:01:59 +0200
- Cc: tiwai@xxxxxxxx, robh+dt@xxxxxxxxxx, krzysztof.kozlowski+dt@xxxxxxxxxx, dinguyen@xxxxxxxxxx, lars@xxxxxxxxxx, nuno.sa@xxxxxxxxxx, upstream@xxxxxxxxxxxx, Paweł Anikiel <pan@xxxxxxxxxxxx>
- In-reply-to: <20230414140203.707729-1-pan@semihalf.com>
- References: <20230414140203.707729-1-pan@semihalf.com>
Apply a workaround for what seems to be a hardware quirk: when using an external MCLK signal, powering on Output and DAC for the first time produces output distortions unless they're powered together with whole chip power. The workaround powers them on in probe for the first time, as doing it later may be impossible (e.g. when starting playback while recording, whole chip power will already be on). Here are some initialization sequences run after all other control registers were set (`ssmset reg val` sets the value of a register via i2c): ssmset 0x09 0x01 # core ssmset 0x06 0x07 # chip, out OK ssmset 0x09 0x01 # core ssmset 0x06 0x87 # out, dac ssmset 0x06 0x07 # chip OK (disable MCLK) ssmset 0x09 0x01 # core ssmset 0x06 0x1f # chip ssmset 0x06 0x07 # out, dac (enable MCLK) OK ssmset 0x09 0x01 # core ssmset 0x06 0x1f # chip ssmset 0x06 0x07 # out, dac NOT OK ssmset 0x06 0x1f # chip ssmset 0x09 0x01 # core ssmset 0x06 0x07 # out, dac NOT OK ssmset 0x09 0x01 # core ssmset 0x06 0x0f # chip, out ssmset 0x06 0x07 # dac NOT OK ssmset 0x09 0x01 # core ssmset 0x06 0x17 # chip, dac ssmset 0x06 0x07 # out NOT OK Here are some sequences run at the very start before a sw reset (and later using one of the NOT OK sequences from above): ssmset 0x09 0x01 # core ssmset 0x06 0x07 # chip, out, dac OK (disable MCLK) ssmset 0x09 0x01 # core ssmset 0x06 0x07 # chip, out, dac (enable MCLK after reset) NOT OK ssmset 0x09 0x01 # core ssmset 0x06 0x17 # chip, dac NOT OK ssmset 0x09 0x01 # core ssmset 0x06 0x0f # chip, out NOT OK ssmset 0x06 0x07 # chip, out, dac NOT OK This was tested on a Google Chameleon v3 board using an SSM2603 with an external MCLK. This doesn't seem to just be a PCB issue, as this was also observed on a ZYBO Z7-10: https://ez.analog.com/audio/f/q-a/543726/solved-ssm2603-right-output-offset-issue/480229 Signed-off-by: Paweł Anikiel <pan@xxxxxxxxxxxx> --- sound/soc/codecs/ssm2602.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/sound/soc/codecs/ssm2602.c b/sound/soc/codecs/ssm2602.c index cbbe83b85ada..021e0c860fa1 100644 --- a/sound/soc/codecs/ssm2602.c +++ b/sound/soc/codecs/ssm2602.c @@ -589,6 +589,17 @@ static int ssm260x_component_probe(struct snd_soc_component *component) return ret; } + /* Workaround for what seems to be a hardware quirk: when using an + * external MCLK signal, powering on Output and DAC for the first + * time produces output distortions unless they're powered together + * with whole chip power. We power them here for the first time, + * as doing it later may be impossible (e.g. when starting playback + * while recording, whole chip power will already be on) + */ + regmap_write(ssm2602->regmap, SSM2602_ACTIVE, 0x01); + regmap_write(ssm2602->regmap, SSM2602_PWR, 0x07); + regmap_write(ssm2602->regmap, SSM2602_RESET, 0x00); + /* set the update bits */ regmap_update_bits(ssm2602->regmap, SSM2602_LINVOL, LINVOL_LRIN_BOTH, LINVOL_LRIN_BOTH); -- 2.40.0.634.g4ca3ef3211-goog
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