On Mon, Mar 20, 2023 at 10:35:16PM +0200, Marian Postevca wrote:
> To properly support a line of Huawei laptops with AMD CPU and a
> ES8336 codec connected to the ACP3X module we need to enable
> the S32 LE format and the codec option to divide the MCLK by 2.
The 32 bit support and MCLK division are two separate changes so should
be two separate patches.
> - lrck_divider = es8316->sysclk / params_rate(params);
> +
> + mclk_div_option = device_property_read_bool(component->dev,
> + "everest,mclk-div-by-2");
> + if (mclk_div_option) {
This introduces a DT property but there's no documentation for it, but I
don't see why we'd want this in the bindings - the driver should be able
to tell from the input clock rate and required output/internal clocks if
it needs to divide MCLK.
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