On 16-03-23, 19:28, Mukunda,Vijendar wrote:
> On 15/03/23 15:12, Vinod Koul wrote:
> > On 07-03-23, 19:01, Vijendar Mukunda wrote:
> >> +/**
> >> + * struct amd_sdw_manager - amd manager driver context
> >> + * @bus: bus handle
> >> + * @dev: linux device
> >> + * @mmio: SoundWire registers mmio base
> >> + * @acp_mmio: acp registers mmio base
> >> + * @reg_mask: register mask structure per manager instance
> >> + * @probe_work: SoundWire manager probe workqueue
> >> + * @acp_sdw_lock: mutex to protect acp share register access
> >> + * @num_din_ports: number of input ports
> >> + * @num_dout_ports: number of output ports
> >> + * @cols_index: Column index in frame shape
> >> + * @rows_index: Rows index in frame shape
> >> + * @instance: SoundWire manager instance
> >> + * @quirks: SoundWire manager quirks
> >> + * @wake_en_mask: wake enable mask per SoundWire manager
> >> + * @power_mode_mask: flag interprets amd SoundWire manager power mode
> >> + */
> >> +struct amd_sdw_manager {
> >> + struct sdw_bus bus;
> >> + struct device *dev;
> >> +
> >> + void __iomem *mmio;
> >> + void __iomem *acp_mmio;
> >> +
> >> + struct sdw_manager_reg_mask *reg_mask;
> >> + struct work_struct probe_work;
> >> + /* mutex to protect acp common register access */
> >> + struct mutex *acp_sdw_lock;
> >> +
> >> + int num_din_ports;
> >> + int num_dout_ports;
> >> +
> >> + int cols_index;
> >> + int rows_index;
> >> +
> >> + u32 instance;
> >> + u32 quirks;
> >> + u32 wake_en_mask;
> >> + u32 power_mode_mask;
> >> +};
> > Does the manager need to be exposed to rest of kernel or users of this
> > driver, is so why?
> Currently, amd_manager structure being used in ACP PCI driver
> (parent driver) and Soundwire DMA driver.
>
> In ACP PCI driver, IRQ handler we will use amd_manager structure to
> schedule workqueue based on soundwire manager instance.
> In Soundwire DMA driver, we need to retrieve amd_manager instance.
> As per our design, we have fixed mapping. We need to use same set of
> DMA registers based on CPU DAI ID.
> i.e if AUDIO0 TX port is selected in amd_manager driver
> then we need to use AUDIO0 TX registers for DMA programming.
> we have included comments for describing mapping in amd_manager.h
> file.
Sorry not sure I follow, can you elaborate which members of above struct
are used by PCI driver?
--
~Vinod
