--- Begin Message ---
- To: Herve Codina <herve.codina@xxxxxxxxxxx>, Rob Herring <robh+dt@xxxxxxxxxx>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@xxxxxxxxxx>, Liam Girdwood <lgirdwood@xxxxxxxxx>, Mark Brown <broonie@xxxxxxxxxx>, Derek Kiernan <derek.kiernan@xxxxxxxxxx>, Dragan Cvetic <dragan.cvetic@xxxxxxxxxx>, Arnd Bergmann <arnd@xxxxxxxx>, Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>, Jaroslav Kysela <perex@xxxxxxxx>, Takashi Iwai <tiwai@xxxxxxxx>
- Subject: [PATCH 1/7] dt-bindings: misc: Add the Lantiq PEF2466 E1/T1/J1 framer
- From: Herve Codina <herve.codina@xxxxxxxxxxx>
- Date: Wed, 15 Mar 2023 14:42:25 +0100
- Cc: linux-kernel@xxxxxxxxxxxxxxx, devicetree@xxxxxxxxxxxxxxx, alsa-devel@xxxxxxxxxxxxxxxx, Christophe Leroy <christophe.leroy@xxxxxxxxxx>, Thomas Petazzoni <thomas.petazzoni@xxxxxxxxxxx>
- In-reply-to: <20230315134231.233193-1-herve.codina@bootlin.com>
- References: <20230315134231.233193-1-herve.codina@bootlin.com>
The Lantiq PEF2256 is a framer and line interface component designed to fulfill all required interfacing between an analog E1/T1/J1 line and the digital PCM system highway/H.100 bus. Signed-off-by: Herve Codina <herve.codina@xxxxxxxxxxx> --- .../bindings/misc/lantiq,pef2256.yaml | 190 ++++++++++++++++++ 1 file changed, 190 insertions(+) create mode 100644 Documentation/devicetree/bindings/misc/lantiq,pef2256.yaml diff --git a/Documentation/devicetree/bindings/misc/lantiq,pef2256.yaml b/Documentation/devicetree/bindings/misc/lantiq,pef2256.yaml new file mode 100644 index 000000000000..1ba788d06a14 --- /dev/null +++ b/Documentation/devicetree/bindings/misc/lantiq,pef2256.yaml @@ -0,0 +1,190 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/misc/lantiq,pef2256.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Lantiq PEF2256 + +maintainers: + - Herve Codina <herve.codina@xxxxxxxxxxx> + +description: + The Lantiq PEF2256, also known as Infineon PEF2256 or FALC256, is a framer and + line interface component designed to fulfill all required interfacing between + an analog E1/T1/J1 line and the digital PCM system highway/H.100 bus. + +properties: + compatible: + const: lantiq,pef2256 + + reg: + maxItems: 1 + + clocks: + items: + - description: Master clock + + clock-names: + items: + - const: mclk + + interrupts: + maxItems: 1 + + reset-gpios: + description: + GPIO used to reset the device. + maxItems: 1 + + pinctrl: + allOf: + - $ref: "/schemas/pinctrl/pinctrl.yaml#" + + patternProperties: + '-pins$': + type: object + allOf: + - $ref: "/schemas/pinctrl/pincfg-node.yaml#" + + properties: + pins: + enum: [ RPA, RPB, RPC, RPD, XPA, XPB, XPC, XPD ] + + function: + enum: [ SYPR, RFM, RFMB, RSIGM, RSIG, DLR, FREEZE, RFSP, LOS, + SYPX, XFMS, XSIG, TCLK, XMFB, XSIGM, DLX, XCLK, XLT, + GPI, GPOH, GPOL ] + + required: + - pins + - function + + lantiq,line-interface: + $ref: /schemas/types.yaml#/definitions/string + enum: [e1, t1j1] + default: e1 + description: | + The line interface type + - e1: E1 line + - t1j1: T1/J1 line + + lantiq,sysclk-rate-hz: + enum: [2048000, 4096000, 8192000, 16384000] + default: 2048000 + description: + Clock rate (Hz) on the system highway. + + lantiq,data-rate-bps: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [2048000, 4096000, 8192000, 16384000] + default: 2048000 + description: + Data rate (bit per seconds) on the system highway. + + lantiq,clock-falling-edge: + $ref: /schemas/types.yaml#/definitions/flag + description: + Data is sent on falling edge of the clock (and received on the rising + edge). If 'clock-falling-edge' is not present, data is sent on the + rising edge (and received on the falling edge). + + lantiq,channel-phase: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2, 3, 4, 5, 6, 7] + default: 0 + description: + The pef2256 delivers a full frame (32 8bit time-slots in E1 and 24 8bit + time-slots 8 8bit signaling in E1/J1) every 125us. This lead to a data + rate of 2048000 bit/s. When lantiq,data-rate-bps is more than 2048000 + bit/s, the data (all 32 8bit) present in the frame are interleave with + unused time-slots. The lantiq,channel-phase property allows to set the + correct alignment of the interleave mechanism. + For instance, suppose lantiq,data-rate-bps = 8192000 (ie 4*2048000), and + lantiq,channel-phase = 2, the interleave schema with unused time-slots + (nu) and used time-slots (XX) for TSi is + nu nu XX nu nu nu XX nu nu nu XX nu + <-- TSi --> <- TSi+1 -> <- TSi+2 -> + With lantiq,data-rate-bps = 8192000, and lantiq,channel-phase = 1, the + interleave schema is + nu XX nu nu nu XX nu nu nu XX nu nu + <-- TSi --> <- TSi+1 -> <- TSi+2 -> + With lantiq,data-rate-bps = 4096000 (ie 2*2048000), and + lantiq,channel-phase = 1, the interleave schema is + nu XX nu XX nu XX + <-- TSi --> <- TSi+1 -> <- TSi+2 -> + + lantiq,subordinate: + $ref: /schemas/types.yaml#/definitions/flag + description: + If present, the pef2256 works in subordinate mode. In this mode it + synchronizes on line interface clock signals. Otherwise, it synchronizes + on internal clocks. + +allOf: + - if: + properties: + lantiq,line-interface: + contains: + const: e1 + then: + properties: + lantiq,frame-format: + $ref: /schemas/types.yaml#/definitions/string + enum: [doubleframe, crc4-multiframe, auto-multiframe] + default: doubleframe + description: | + The E1 line interface frame format + - doubleframe: Doubleframe format + - crc4-multiframe: CRC4 multiframe format + - auto-multiframe: CRC4 multiframe format with interworking + capabilities (ITU-T G.706 Annex B) + + else: + # T1/J1 line + properties: + lantiq,frame-format: + $ref: /schemas/types.yaml#/definitions/string + enum: [4frame, 12frame, 24frame, 72frame] + default: 12frame + description: | + The T1/J1 line interface frame format + - 4frame: 4-frame multiframe format (F4) + - 12frame: 12-frame multiframe format (F12, D3/4) + - 24frame: 24-frame multiframe format (ESF) + - 72frame: 72-frame multiframe format (F72, remote switch mode) + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + pef2256@2000000 { + compatible = "lantiq,pef2256"; + reg = <0x2000000 0xFF>; + interrupts = <8 1>; + interrupt-parent = <&PIC>; + clocks = <&clk_mclk>; + clock-names = "mclk"; + reset-gpios = <&gpio 11 GPIO_ACTIVE_LOW>; + lantiq,sysclk-rate-hz = <8192000>; + lantiq,data-rate-bps = <4096000>; + + pinctrl { + pef2256_rpa_sypr: rpa-pins { + pins = "RPA"; + function = "SYPR"; + }; + pef2256_xpa_sypx: xpa-pins { + pins = "XPA"; + function = "SYPX"; + }; + }; + }; -- 2.39.2
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