On 24/02/2023 11:56, Chancel Liu wrote: >> On Wed, Feb 22, 2023 at 07:39:43PM +0800, Chancel Liu wrote: >>> This property specifies power up to audio out time. It's necessary >>> beacause this device has to wait some time before ready to output >>> audio after MCLK, BCLK and MUTE=1 are enabled. For more details about >>> the timing constraints, please refer to WTN0302 on >>> https://www.cirrus.com/products/wm8524/ >> >> According to that the delay is a property of MCLK and the sample rate rather >> than a per board constant, it shouldn't be in DT but rather the driver should >> figure out the required delay on each startup. > > I can't agree with you more. From the power up to audio out timing table in > WTN0302, the delay depends on sample rate and MCLK. Driver should calculate it > rather than read it from DT. However as I mentioned in my last email, values in > the table seem not accurate for all systems. It's a kind of compromise to get > the value from DT. Do other codecs have a similar situation? DT is for hardware properties, not for software compromises. Best regards, Krzysztof
