Le 15/02/2023 à 23:44, Leo Li a écrit : > > >> -----Original Message----- >> From: Herve Codina <herve.codina@xxxxxxxxxxx> >> Sent: Thursday, January 26, 2023 2:32 AM >> To: Herve Codina <herve.codina@xxxxxxxxxxx>; Leo Li >> <leoyang.li@xxxxxxx>; Rob Herring <robh+dt@xxxxxxxxxx>; Krzysztof >> Kozlowski <krzysztof.kozlowski+dt@xxxxxxxxxx>; Liam Girdwood >> <lgirdwood@xxxxxxxxx>; Mark Brown <broonie@xxxxxxxxxx>; Christophe >> Leroy <christophe.leroy@xxxxxxxxxx>; Michael Ellerman >> <mpe@xxxxxxxxxxxxxx>; Nicholas Piggin <npiggin@xxxxxxxxx>; Qiang Zhao >> <qiang.zhao@xxxxxxx>; Jaroslav Kysela <perex@xxxxxxxx>; Takashi Iwai >> <tiwai@xxxxxxxx>; Shengjiu Wang <shengjiu.wang@xxxxxxxxx>; Xiubo Li >> <Xiubo.Lee@xxxxxxxxx>; Fabio Estevam <festevam@xxxxxxxxx>; Nicolin >> Chen <nicoleotsuka@xxxxxxxxx> >> Cc: linuxppc-dev@xxxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; >> devicetree@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx; alsa-devel@alsa- >> project.org; Thomas Petazzoni <thomas.petazzoni@xxxxxxxxxxx> >> Subject: [PATCH v4 06/10] soc: fsl: cmp1: Add support for QMC > > Typo: cpm1 > >> >> The QMC (QUICC Multichannel Controller) emulates up to 64 channels within >> one serial controller using the same TDM physical interface routed from the >> TSA. >> >> It is available in some PowerQUICC SoC such as the >> MPC885 or MPC866. >> >> It is also available on some Quicc Engine SoCs. >> This current version support CPM1 SoCs only and some enhancement are >> needed to support Quicc Engine SoCs. >> >> Signed-off-by: Herve Codina <herve.codina@xxxxxxxxxxx> > > Otherwise looks good to me. > > Acked-by: Li Yang <leoyang.li@xxxxxxx> Thanks for the review and the ack. Were you also able to have a look at patch 2 which implements support for the timeslot assigner (TSA) ? Christophe
