On 14/02/23 19:05, Pierre-Louis Bossart wrote:
>
>>>> static void amd_sdw_irq_thread(struct work_struct *work)
>>>> {
>>>> struct amd_sdw_manager *amd_manager =
>>>> @@ -945,6 +952,9 @@ static void amd_sdw_irq_thread(struct work_struct *work)
>>>> status_change_0to7 = acp_reg_readl(amd_manager->mmio + ACP_SW_STATE_CHANGE_STATUS_0TO7);
>>>> dev_dbg(amd_manager->dev, "%s [SDW%d] SDW INT: 0to7=0x%x, 8to11=0x%x\n",
>>>> __func__, amd_manager->instance, status_change_0to7, status_change_8to11);
>>>> + if (status_change_8to11 & AMD_SDW_WAKE_STAT_MASK)
>>>> + return amd_sdw_process_wake_event(amd_manager);
>>>> +
>>> it's not clear what 8to11 might have to do with the wake enable?
>>>
>>> Can't you have a wake for devices 1..7?
>> It can wake any device from 1..11 .
>> SoundWire Wake interrupt status bit is part of 8to11 register.
> You probably want to explain what status_change_0to7 and
> status_change_8to11 actually control, it's not very intuitive for me to
> see device 1 interrupt being handled in status_change_8to11?
Peripheral device status interrupts on manager side will be read by reading
0to7 (for devices 1..7) and 8to11 (for devices 8 ..11) registers.
8to11 register will contain field for reading Soundwire wake enable status
for Soundwire manager instance.
