On 09/02/2023 16:33, Pierre-Louis Bossart wrote:
On 2/9/23 09:52, Srinivas Kandagatla wrote:
On 09/02/2023 15:23, Pierre-Louis Bossart wrote:
On 2/9/23 07:13, Srinivas Kandagatla wrote:
Wait for Fifo to be empty before going to suspend or before bank
switch happens. Just to make sure that all the reads/writes are done.
For the suspend case that seems like a valid approach, but for bank
switch don't we already have a bus->msg_lock mutex that will prevent the
bank switch command from being sent before the other commands are
handled?
All read/writes are fifo based, so writes could be still pending.
I am not following. The bank switch happens with this function, where a
mutex is taken.
int sdw_transfer(struct sdw_bus *bus, struct sdw_msg *msg)
{
int ret;
mutex_lock(&bus->msg_lock);
ret = sdw_transfer_unlocked(bus, msg);
Qualcomm controller uses fifo to read/write, so return after writing to
fifo might not always indicate that write is completed.
Qcom Soundwire controller do not have any synchronous interrupt
mechanism to indicate write complete.
--srini
mutex_unlock(&bus->msg_lock);
return ret;
}
The transfer_unlocked is synchronous and waits for the command response
to be available.
In other words, there's both a mutual exclusion and a synchronous
behavior, so not sure how commands *before* the bank switch could be
pending?
