On 1/31/23 05:03, Richard Fitzgerald wrote: > On 30/01/2023 16:45, Pierre-Louis Bossart wrote: >> >> >> On 1/27/23 10:51, Stefan Binding wrote: >>> Since clock stop causes bus reset on Intel controllers, we need >> >> nit-pick: It's more that the Intel controller has a power optimization >> where the context is lost when stopping the clock, which requires a bus >> reset and full re-enumeration/initialization when the clock resumes. >> > > Ok, it's true that clock stop doesn't _cause_ bus reset, bus reset is > necessary when exiting clock stop. We can re-word if you want us to > describe that accurately. > > But from the codec driver's point of view, a clock stop causes a bus > reset. it's fine, we all agree here. >> The rest of the patch is fine so >> >> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@xxxxxxxxxxxxxxx> >> >>> to wait for the debounce interval on resume, to ensure all the >>> interrupt status registers are set correctly. >>> >>> Signed-off-by: Stefan Binding <sbinding@xxxxxxxxxxxxxxxxxxxxx>
