On 05/10/2022 15:47, Amadeusz Sławiński wrote:
...
Well in worse case we can revert the patch in question, but I would like
to get it working...
Maybe also try to raise timeout to 1000, as what original code called
timeout, was actually number of retries? So 300 * udelay(3) which is
more or less 900us, so we can round it up for test?
I mean, something like:
--- a/sound/hda/hdac_stream.c
+++ b/sound/hda/hdac_stream.c
@@ -176,7 +176,7 @@ void snd_hdac_stream_reset(struct hdac_stream *azx_dev)
snd_hdac_stream_updateb(azx_dev, SD_CTL, 0, SD_CTL_STREAM_RESET);
/* wait for hardware to report that the stream entered reset */
- snd_hdac_stream_readb_poll(azx_dev, SD_CTL, val, (val &
SD_CTL_STREAM_RESET), 3, 300);
+ snd_hdac_stream_readb_poll(azx_dev, SD_CTL, val, (val &
SD_CTL_STREAM_RESET), 3, 1000);
if (azx_dev->bus->dma_stop_delay && dma_run_state)
udelay(azx_dev->bus->dma_stop_delay);
@@ -184,7 +184,7 @@ void snd_hdac_stream_reset(struct hdac_stream *azx_dev)
snd_hdac_stream_updateb(azx_dev, SD_CTL, SD_CTL_STREAM_RESET, 0);
/* wait for hardware to report that the stream is out of reset */
- snd_hdac_stream_readb_poll(azx_dev, SD_CTL, val, !(val &
SD_CTL_STREAM_RESET), 3, 300);
+ snd_hdac_stream_readb_poll(azx_dev, SD_CTL, val, !(val &
SD_CTL_STREAM_RESET), 3, 1000);
/* reset first position - may not be synced with hw at this
time */
if (azx_dev->posbuf)
in addition to Takashi suggestion?
Thanks. Tried that on top of Takaski's patch but still not working :-(
Jon
--
nvpublic
