On Fri, May 23, 2008 at 05:56:00PM -0500, Geoffrey Wossum wrote: > First, I changed it so the AVR32 provided the BCLK and FRAME. I could never > get the WM8510 to generate what looked like proper FRAMES. I did continue > using the WM8510's PLL to generate the DAC clock. With the AVR32 providing > the clocks, I at least got some noise out of it. The frame clock rate generated by the WM8510 will be 1/256 of the system clock, which should be configured to 256 times the sample rate using the PLL and dividers. > Finally, I really had to lie in the wm8510 code and say that it supported a > minimum of 2 channels, and a maximum of 2 channels. This makes sense from > the data sheet, since it still wants a left and a right channel of data, and > just throws one away. Yes, that's right. I've applied your changes to the driver - thanks! > I had to change the WM8510's format to say that it wanted big endian. Should > the CODEC (and platform and machine) be setup just to say that it uses > SNDRV_PCM_FMTBIT_S16 instead of SNDRV_PCM_FMTBIT_S16_LE/BE? Looks from > sound/pcm.h this should just do the Right Thing. Yes, it does look reasonable - I'll investigate. > Like I said before, it generated a 44.1 kHz frame no matter the BCLK divider > or the word length were set to. The frame clock is independent of both those options - I assume you are using a static system clock? > Thanks for the help! As soon as I get the code cleaned up some, I'll > contribute the AVR32 platform driver code. That would be excellent. _______________________________________________ Alsa-devel mailing list Alsa-devel@xxxxxxxxxxxxxxxx http://mailman.alsa-project.org/mailman/listinfo/alsa-devel
