On 20/06/2022 23:46, Damien Le Moal wrote:
> On 6/21/22 06:06, Conor.Dooley@xxxxxxxxxxxxx wrote:
>> On 20/06/2022 21:56, Serge Semin wrote:
>>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>>
>>> On Sat, Jun 18, 2022 at 01:30:28PM +0100, Conor Dooley wrote:
>>>> From: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
>>>>
>>>> snps,dwc-ssi-1.01a has a single user - the Canaan k210, which uses a
>>>> width of 4 for spi-{r,t}x-bus-width. Update the binding to reflect
>>>> this.
>>>>
>>>> Signed-off-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
>>>> ---
>>>> .../bindings/spi/snps,dw-apb-ssi.yaml | 48 ++++++++++++++-----
>>>> 1 file changed, 35 insertions(+), 13 deletions(-)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
>>>> index e25d44c218f2..f2b9e3f062cd 100644
>>>> --- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
>>>> +++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
>>>> @@ -135,19 +135,41 @@ properties:
>>>> of the designware controller, and the upper limit is also subject to
>>>> controller configuration.
>>>>
>>>> -patternProperties:
>>>> - "^.*@[0-9a-f]+$":
>>>> - type: object
>>>> - properties:
>>>> - reg:
>>>> - minimum: 0
>>>> - maximum: 3
>>>> -
>>>> - spi-rx-bus-width:
>>>> - const: 1
>>>> -
>>>> - spi-tx-bus-width:
>>>> - const: 1
>>>> +if:
>>>> + properties:
>>>> + compatible:
>>>> + contains:
>>>> + const: snps,dwc-ssi-1.01a
>>>> +
>>>> +then:
>>>> + patternProperties:
>>>> + "^.*@[0-9a-f]+$":
>>>> + type: object
>>>> + properties:
>>>> + reg:
>>>> + minimum: 0
>>>> + maximum: 3
>>>> +
>>>> + spi-rx-bus-width:
>>>> + const: 4
>>>> +
>>>> + spi-tx-bus-width:
>>>> + const: 4
>>>> +
>>>> +else:
>>>> + patternProperties:
>>>> + "^.*@[0-9a-f]+$":
>>>> + type: object
>>>> + properties:
>>>> + reg:
>>>> + minimum: 0
>>>> + maximum: 3
>>>> +
>>>> + spi-rx-bus-width:
>>>> + const: 1
>>>> +
>>>> + spi-tx-bus-width:
>>>> + const: 1
>>>
>>> You can just use a more relaxed constraint "enum: [1 2 4 8]" here
>>
>> 8 too? sure.
>>
>>> irrespective from the compatible string. The modern DW APB SSI
>>> controllers of v.4.* and newer also support the enhanced SPI Modes too
>>> (Dual, Quad and Octal). Since the IP-core version is auto-detected at
>>> run-time there is no way to create a DT-schema correctly constraining
>>> the Rx/Tx SPI bus widths. So let's keep the
>>> compatible-string-independent "patternProperties" here but just extend
>>> the set of acceptable "spi-rx-bus-width" and "spi-tx-bus-width"
>>> properties values.
>>
>> SGTM!
>>
>>>
>>> Note the DW APB SSI/AHB SSI driver currently doesn't support the
>>> enhanced SPI modes. So I am not sure whether the multi-lines Rx/Tx SPI
>>> bus indeed works for Canaan K210 AHB SSI controller. AFAICS from the
>>> DW APB SSI v4.01a manual the Enhanced SPI mode needs to be properly
>>> activated by means of the corresponding CSR. So most likely the DW AHB
>>> SSI controllers need some specific setups too.
>>
>> hmm, well I'll leave that up to people that have Canaan hardware!
>
> I will test this series.
>
Cool, thanks.
I'll try to get a respin out tomorrow w/ the memory node "unfixed".
Conor.
>> Thanks,
>> Conor.
>>
>>>
>>> -Sergey
>>>
>>>>
>>>> unevaluatedProperties: false
>>>>
>>>> --
>>>> 2.36.1
>>>>
>>
>
>
