On Tue, Apr 5, 2022 at 4:00 PM Sascha Hauer <s.hauer@xxxxxxxxxxxxxx> wrote:
> fsl_set_clock_params() is used only once and easily be folded into its
> caller, do so.
>
> Signed-off-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>
>
Acked-by: Shengjiu Wang <shengjiu.wang@xxxxxxxxx>
Best regards
Wang Shengjiu
> ---
> sound/soc/fsl/fsl_micfil.c | 41 ++++++++++++--------------------------
> 1 file changed, 13 insertions(+), 28 deletions(-)
>
> diff --git a/sound/soc/fsl/fsl_micfil.c b/sound/soc/fsl/fsl_micfil.c
> index 99c256f46f38e..26b3395020973 100644
> --- a/sound/soc/fsl/fsl_micfil.c
> +++ b/sound/soc/fsl/fsl_micfil.c
> @@ -253,29 +253,6 @@ static int fsl_micfil_trigger(struct
> snd_pcm_substream *substream, int cmd,
> return 0;
> }
>
> -static int fsl_set_clock_params(struct device *dev, unsigned int rate)
> -{
> - struct fsl_micfil *micfil = dev_get_drvdata(dev);
> - int clk_div = 8;
> - int osr = MICFIL_OSR_DEFAULT;
> - int ret;
> -
> - ret = clk_set_rate(micfil->mclk, rate * clk_div * osr * 8);
> - if (ret)
> - return ret;
> -
> - ret = micfil_set_quality(micfil);
> - if (ret)
> - return ret;
> -
> - ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL2,
> - MICFIL_CTRL2_CLKDIV | MICFIL_CTRL2_CICOSR,
> - FIELD_PREP(MICFIL_CTRL2_CLKDIV, clk_div) |
> - FIELD_PREP(MICFIL_CTRL2_CICOSR, 16 -
> osr));
> -
> - return ret;
> -}
> -
> static int fsl_micfil_hw_params(struct snd_pcm_substream *substream,
> struct snd_pcm_hw_params *params,
> struct snd_soc_dai *dai)
> @@ -283,7 +260,8 @@ static int fsl_micfil_hw_params(struct
> snd_pcm_substream *substream,
> struct fsl_micfil *micfil = snd_soc_dai_get_drvdata(dai);
> unsigned int channels = params_channels(params);
> unsigned int rate = params_rate(params);
> - struct device *dev = &micfil->pdev->dev;
> + int clk_div = 8;
> + int osr = MICFIL_OSR_DEFAULT;
> int ret;
>
> /* 1. Disable the module */
> @@ -298,11 +276,18 @@ static int fsl_micfil_hw_params(struct
> snd_pcm_substream *substream,
> if (ret)
> return ret;
>
> - ret = fsl_set_clock_params(dev, rate);
> - if (ret < 0) {
> - dev_err(dev, "Failed to set clock parameters [%d]\n", ret);
> + ret = clk_set_rate(micfil->mclk, rate * clk_div * osr * 8);
> + if (ret)
> return ret;
> - }
> +
> + ret = micfil_set_quality(micfil);
> + if (ret)
> + return ret;
> +
> + ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL2,
> + MICFIL_CTRL2_CLKDIV | MICFIL_CTRL2_CICOSR,
> + FIELD_PREP(MICFIL_CTRL2_CLKDIV, clk_div) |
> + FIELD_PREP(MICFIL_CTRL2_CICOSR, 16 -
> osr));
>
> micfil->dma_params_rx.peripheral_config = &micfil->sdmacfg;
> micfil->dma_params_rx.peripheral_size = sizeof(micfil->sdmacfg);
> --
> 2.30.2
>
>
