On Thu, Mar 31, 2022 at 12:24:46PM +0530, Vinod Koul wrote:
> On 31-03-22, 08:49, Sascha Hauer wrote:
> > On Thu, Mar 31, 2022 at 10:56:09AM +0530, Vinod Koul wrote:
> > > On 28-03-22, 13:27, Sascha Hauer wrote:
> > > > Signed-off-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>
> > >
> > > it is dmaengine: xxx
> >
> > Ok.
> >
> > >
> > > Also is this patch dependent on rest of the series, if not consider
> > > sending separately
> >
> > The rest of this series indeed depends on this patch.
> >
> > >
> > > > diff --git a/include/linux/platform_data/dma-imx.h b/include/linux/platform_data/dma-imx.h
> > > > index 281adbb26e6bd..4a43a048e1b4d 100644
> > > > --- a/include/linux/platform_data/dma-imx.h
> > > > +++ b/include/linux/platform_data/dma-imx.h
> > > > @@ -39,6 +39,7 @@ enum sdma_peripheral_type {
> > > > IMX_DMATYPE_SSI_DUAL, /* SSI Dual FIFO */
> > > > IMX_DMATYPE_ASRC_SP, /* Shared ASRC */
> > > > IMX_DMATYPE_SAI, /* SAI */
> > > > + IMX_DMATYPE_MULTI_SAI, /* MULTI FIFOs For Audio */
> > > > };
> > > >
> > > > enum imx_dma_prio {
> > > > @@ -65,4 +66,10 @@ static inline int imx_dma_is_general_purpose(struct dma_chan *chan)
> > > > !strcmp(chan->device->dev->driver->name, "imx-dma");
> > > > }
> > > >
> > > > +struct sdma_peripheral_config {
> > > > + int n_fifos_src;
> > > > + int n_fifos_dst;
> > > > + bool sw_done;
> > > > +};
> > >
> > > Not more platform data :(
> >
> > I'm not sure what you are referring to as platform_data. This is not the
> > classical platform_data that is attached to a platform_device to
> > configure behaviour of that device. It is rather data that needs to be
> > communicated from the clients of the SDMA engine to the SDMA engine.
> >
> > I have put this into include/linux/platform_data/dma-imx.h because
> > that's the only existing include file that is available. I could move
> > this to a new file if you like that better.
>
> Lets move to include/linux/dma/
Ok.
>
> >
> > >
> > > Can you explain this structure and why this is required? What do these
> > > fields refer to..?
> >
> > The reasoning for this structure is described in the commit message that
> > I have forgotten:
> >
> > The i.MX SDMA engine can read from / write to multiple successive
> > hardware FIFO registers, referred to as "Multi FIFO support". This is
> > needed for the micfil driver and certain configurations of the SAI
> > driver. This patch adds support for this feature.
> >
> > The number of FIFOs to read from / write to must be communicated from
> > the client driver to the SDMA engine. For this the struct
> > dma_slave_config::peripheral_config field is used.
> >
> > I can describe the individual fields of struct sdma_peripheral_config in
> > the header file if that's your point.
>
> So you need to know the number of fifo right, what does sw_done imply?
Honestly I don't know. Setting sw_done results in the DONE_SEL0 bit in
the SDMA engine being set. This is described in the reference manual
as:
DONE_SEL0 Select Done from SW or HW for channel 0
0 HW
1 SW
I can only assume that the signaling when a channel has transferred
enough data (the generation of the channel done interrupt?) can either
be done in hardware or in software in the SDMA engine. What I can tell
for sure is that I need this bit set ;)
>
> Also if this is hardware information, why not use dma-cells for this?
The information is not static. For the micfil the number of fifos equals
the number of channels that are recorded, see next patch:
+ micfil->dma_params_rx.peripheral_config = &micfil->sdmacfg;
+ micfil->dma_params_rx.peripheral_size = sizeof(micfil->sdmacfg);
+ micfil->sdmacfg.n_fifos_src = channels;
+ micfil->sdmacfg.sw_done = true;
Sascha
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