on Qualcomm codecs gain tlv control specifies min max range as both
negative to positive numbers like
SOC_SINGLE_S8_TLV("... Volume", .., -84, 40, gain)
However with recent boundary checks added in commit 817f7c9335ec0
("ASoC: ops: Reject out of bounds values in snd_soc_put_volsw())
setting a value above 40 gain will fail.
So fix this min max range correctly to
SOC_SINGLE_S8_TLV("... Volume", .., 0, 124, gain)
so that users can now set gain correctly
Fixes: af3d54b99764 ("ASoC: codecs: lpass-rx-macro: add support for lpass rx macro")
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@xxxxxxxxxx>
---
sound/soc/codecs/lpass-rx-macro.c | 28 ++++++++++++++--------------
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/sound/soc/codecs/lpass-rx-macro.c b/sound/soc/codecs/lpass-rx-macro.c
index 058d8634ce40..d31d4d45ba01 100644
--- a/sound/soc/codecs/lpass-rx-macro.c
+++ b/sound/soc/codecs/lpass-rx-macro.c
@@ -2800,17 +2800,17 @@ static int rx_macro_iir_filter_info(struct snd_kcontrol *kcontrol,
static const struct snd_kcontrol_new rx_macro_snd_controls[] = {
SOC_SINGLE_S8_TLV("RX_RX0 Digital Volume", CDC_RX_RX0_RX_VOL_CTL,
- -84, 40, digital_gain),
+ 0, 124, digital_gain),
SOC_SINGLE_S8_TLV("RX_RX1 Digital Volume", CDC_RX_RX1_RX_VOL_CTL,
- -84, 40, digital_gain),
+ 0, 124, digital_gain),
SOC_SINGLE_S8_TLV("RX_RX2 Digital Volume", CDC_RX_RX2_RX_VOL_CTL,
- -84, 40, digital_gain),
+ 0, 124, digital_gain),
SOC_SINGLE_S8_TLV("RX_RX0 Mix Digital Volume", CDC_RX_RX0_RX_VOL_MIX_CTL,
- -84, 40, digital_gain),
+ 0, 124, digital_gain),
SOC_SINGLE_S8_TLV("RX_RX1 Mix Digital Volume", CDC_RX_RX1_RX_VOL_MIX_CTL,
- -84, 40, digital_gain),
+ 0, 124, digital_gain),
SOC_SINGLE_S8_TLV("RX_RX2 Mix Digital Volume", CDC_RX_RX2_RX_VOL_MIX_CTL,
- -84, 40, digital_gain),
+ 0, 124, digital_gain),
SOC_SINGLE_EXT("RX_COMP1 Switch", SND_SOC_NOPM, RX_MACRO_COMP1, 1, 0,
rx_macro_get_compander, rx_macro_set_compander),
@@ -2834,28 +2834,28 @@ static const struct snd_kcontrol_new rx_macro_snd_controls[] = {
rx_macro_aux_hpf_mode_put),
SOC_SINGLE_S8_TLV("IIR0 INP0 Volume",
- CDC_RX_SIDETONE_IIR0_IIR_GAIN_B1_CTL, -84, 40,
+ CDC_RX_SIDETONE_IIR0_IIR_GAIN_B1_CTL, 0, 124,
digital_gain),
SOC_SINGLE_S8_TLV("IIR0 INP1 Volume",
- CDC_RX_SIDETONE_IIR0_IIR_GAIN_B2_CTL, -84, 40,
+ CDC_RX_SIDETONE_IIR0_IIR_GAIN_B2_CTL, 0, 124,
digital_gain),
SOC_SINGLE_S8_TLV("IIR0 INP2 Volume",
- CDC_RX_SIDETONE_IIR0_IIR_GAIN_B3_CTL, -84, 40,
+ CDC_RX_SIDETONE_IIR0_IIR_GAIN_B3_CTL, 0, 124,
digital_gain),
SOC_SINGLE_S8_TLV("IIR0 INP3 Volume",
- CDC_RX_SIDETONE_IIR0_IIR_GAIN_B4_CTL, -84, 40,
+ CDC_RX_SIDETONE_IIR0_IIR_GAIN_B4_CTL, 0, 124,
digital_gain),
SOC_SINGLE_S8_TLV("IIR1 INP0 Volume",
- CDC_RX_SIDETONE_IIR1_IIR_GAIN_B1_CTL, -84, 40,
+ CDC_RX_SIDETONE_IIR1_IIR_GAIN_B1_CTL, 0, 124,
digital_gain),
SOC_SINGLE_S8_TLV("IIR1 INP1 Volume",
- CDC_RX_SIDETONE_IIR1_IIR_GAIN_B2_CTL, -84, 40,
+ CDC_RX_SIDETONE_IIR1_IIR_GAIN_B2_CTL, 0, 124,
digital_gain),
SOC_SINGLE_S8_TLV("IIR1 INP2 Volume",
- CDC_RX_SIDETONE_IIR1_IIR_GAIN_B3_CTL, -84, 40,
+ CDC_RX_SIDETONE_IIR1_IIR_GAIN_B3_CTL, 0, 124,
digital_gain),
SOC_SINGLE_S8_TLV("IIR1 INP3 Volume",
- CDC_RX_SIDETONE_IIR1_IIR_GAIN_B4_CTL, -84, 40,
+ CDC_RX_SIDETONE_IIR1_IIR_GAIN_B4_CTL, 0, 124,
digital_gain),
SOC_SINGLE("IIR1 Band1 Switch", CDC_RX_SIDETONE_IIR0_IIR_CTL,
--
2.21.0
