On 17-02-2022 13:04, Thierry Reding wrote:
On Fri, Jan 28, 2022 at 06:07:53PM +0530, Sameer Pujar wrote:
Add clocks, power-domain and memory bindings to support APE subsystem
on Tegra234.
Signed-off-by: Sameer Pujar<spujar@xxxxxxxxxx>
---
include/dt-bindings/clock/tegra234-clock.h | 74 +++++++++++++++++++++++++-
include/dt-bindings/memory/tegra234-mc.h | 7 +++
include/dt-bindings/power/tegra234-powergate.h | 9 ++++
3 files changed, 89 insertions(+), 1 deletion(-)
create mode 100644 include/dt-bindings/power/tegra234-powergate.h
[...]
diff --git a/include/dt-bindings/memory/tegra234-mc.h b/include/dt-bindings/memory/tegra234-mc.h
index 2662f70..444e62d 100644
--- a/include/dt-bindings/memory/tegra234-mc.h
+++ b/include/dt-bindings/memory/tegra234-mc.h
@@ -1,4 +1,5 @@
/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
+/* Copyright (c) 2018-2022, NVIDIA CORPORATION. All rights reserved. */
#ifndef DT_BINDINGS_MEMORY_TEGRA234_MC_H
#define DT_BINDINGS_MEMORY_TEGRA234_MC_H
@@ -7,6 +8,8 @@
#define TEGRA234_SID_INVALID 0x00
#define TEGRA234_SID_PASSTHROUGH 0x7f
+/* NISO0 stream IDs */
+#define TEGRA234_SID_APE 0x02
/* NISO1 stream IDs */
#define TEGRA234_SID_SDMMC4 0x02
@@ -20,6 +23,10 @@
#define TEGRA234_MEMORY_CLIENT_SDMMCRAB 0x63
/* sdmmcd memory write client */
#define TEGRA234_MEMORY_CLIENT_SDMMCWAB 0x67
+/* Audio Processing (APE) engine read clients */
+#define TEGRA234_MEMORY_CLIENT_APER 0x7a
+/* Audio Processing (APE) engine write clients */
+#define TEGRA234_MEMORY_CLIENT_APEW 0x7b
/* BPMP read client */
#define TEGRA234_MEMORY_CLIENT_BPMPR 0x93
/* BPMP write client */
This usually needs to be accompanied by a corresponding addition to the
memory controller driver. Unfortunately it seems like the changes
targetted at v5.17-rc1 never made it upstream, so I've queued them up
again for v5.18-rc1. They should show up in today's linux-next. When
they do, can you please follow up with a patch to the memory controller
driver that adds the various registers for these clients?
OK, I will follow up.
