codec system clock source support 512FS MCLK synchronous directly, so
no need to set PLL configuration when MCLK 24.576MHz.
Suggested-by: Shuming Fan <shumingf@xxxxxxxxxxx>
Signed-off-by: Mac Chiang <mac.chiang@xxxxxxxxx>
---
sound/soc/intel/boards/sof_rt5682.c | 17 +++++++++++------
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/sound/soc/intel/boards/sof_rt5682.c b/sound/soc/intel/boards/sof_rt5682.c
index bd6d2e7dea53..a6efffc14cad 100644
--- a/sound/soc/intel/boards/sof_rt5682.c
+++ b/sound/soc/intel/boards/sof_rt5682.c
@@ -61,7 +61,6 @@
#define SOF_MAX98390_SPEAKER_AMP_PRESENT BIT(24)
#define SOF_MAX98390_TWEETER_SPEAKER_PRESENT BIT(25)
-
/* Default: MCLK on, MCLK 19.2M, SSP0 */
static unsigned long sof_rt5682_quirk = SOF_RT5682_MCLK_EN |
SOF_RT5682_SSP_CODEC(0);
@@ -362,6 +361,9 @@ static int sof_rt5682_hw_params(struct snd_pcm_substream *substream,
if (sof_rt5682_quirk & SOF_RT5682S_HEADPHONE_CODEC_PRESENT) {
pll_id = RT5682S_PLL2;
clk_id = RT5682S_SCLK_S_PLL2;
+
+ if (pll_in == 24576000)
+ clk_id = RT5682S_SCLK_S_MCLK;
} else {
pll_id = RT5682_PLL1;
clk_id = RT5682_SCLK_S_PLL1;
@@ -369,11 +371,14 @@ static int sof_rt5682_hw_params(struct snd_pcm_substream *substream,
pll_out = params_rate(params) * 512;
- /* Configure pll for codec */
- ret = snd_soc_dai_set_pll(codec_dai, pll_id, pll_source, pll_in,
- pll_out);
- if (ret < 0)
- dev_err(rtd->dev, "snd_soc_dai_set_pll err = %d\n", ret);
+ /* when MCLK is 512FS, no need to set PLL configuration additionally. */
+ if (pll_in != 24576000) {
+ /* Configure pll for codec */
+ ret = snd_soc_dai_set_pll(codec_dai, pll_id, pll_source, pll_in,
+ pll_out);
+ if (ret < 0)
+ dev_err(rtd->dev, "snd_soc_dai_set_pll err = %d\n", ret);
+ }
/* Configure sysclk for codec */
ret = snd_soc_dai_set_sysclk(codec_dai, clk_id,
--
2.20.1
