On Mon, Oct 04, 2021 at 11:17:47AM +0200, Ricard Wanderlof wrote: > + gpios: > + maxItems: 1 > + description: GPIO pin used for codec reset (RESET pin) Usually this would be called reset-gpios and/or have a name to improve readability and allow for extensibility, from the binding we can see that the device has other signals that can be used as GPIOs. > + ti,pll-mode: > + $ref: /schemas/types.yaml#/definitions/uint32 > + enum: > + - 0 # ADC3XXX_PLL_DONT_SET - leave mode unchanged > + - 1 # ADC3XXX_PLL_ENABLE - use the on-chip PLL > + - 2 # ADC3XXX_PLL_BYPASS - do not use the on-chip PLL > + - 3 # ADC3XXX_PLL_AUTO - use on-chip PLL if possible > + default: 0 > + description: | > + Set on-chip PLL mode. > + ADC3XXX_PLL_DONT_SET is intended for use when setting the clock mod > + via the clock id in a machine driver and it is not to be changed > + from the previous setting. > + ADC3XXX_PLL_AUTO will enable on-chip PLL if possible, depending on the > + master clock and sample rate combination. Why is this configured through the DT binding and not via the machine driver as done for other drivers? > + Note that there is currently no support for reading the GPIO pins as > + inputs. This doesn't belong in the binding document, it's describing the binding not any particular implementation.
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