On Tue, Mar 02, 2021 at 05:04:44PM +0000, Lucas Tanure wrote: > The driver was setting bit clock polarity opposite to intended polarity. This is a bug fix which should be a separate patch and at the start of the series so it should be sent separately before any non-fix stuff. > Also simplify the code by grouping ADC and DAC clock configurations into > a single field.
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