Hey, On Wed, 24 Feb 2021, Hui Wang wrote: > On 2/24/21 1:51 AM, Kai Vehmanen wrote: > > interface all pins are exposed. Each pin does provide functionality to > > query whether a display is connected to it, and whether the connected > > display has audio capability. > > > > The maximum number of concurrent displays is described as converters. > > On TGL this is 4. > If a physical port supports DP-MST, does the 3 connections on this physical > port share a single converter? And each connection has an independent pcm, > maybe the driver should create pcm pool according to num_converter * 3. DP-MST is is reported per-pin, so basicly the interface can report display connection status for "numpins*3" endpoints so that would be 9*3 on Intel TGL systems. However, this doesn't affect the converters. There is still four converters, so 4 PCMs are enough to cover all possible combination of plain DP/HDMI and DP-MST. User-space can query the ELD information to learn the mapping from a PCM to a specific display (like e.g. Pulseaudio does). I sent a patch "ALSA: hda/proc - print DP-MST connections" to visualize these a bit better in procfs output. I put example output in the commit: https://lore.kernel.org/r/20201208185736.2877541-1-kai.vehmanen@xxxxxxxxxxxxxxx The existing driver provides a PCM for each pin, plus reserve two extra PCMs for DP-MST. There's merit to this design as well, but arguably the SOF approach is easier to understand on systems like TGL and ICL. Br, Kai