At Fri, 18 Jan 2008 22:41:51 +0100, Pavel Hofman wrote: > > Hi Takashi, > > Sorry for distracting you from the constant struggle with HDA. > > I would like to provide complete support for the ESI Juli@ card. > Informing the ADC (AK5385) about current sample rate via the dedicated > GPIOs is fairly simple, as well as the monitoring features (DIGOUT, > DIGIN, ANAIN, MUTE + volume control of the remaining DACs). > > However, I do not understand functions of the GPIO_FREQ_XXKHZ and > GPIO_MULTI_XX GPIOs. The card's user manual says the card can detect > incoming SPDIF rate. AK4114 can either read the rate from the input data > in professional format only, or detect it by comparing external clock > with the input rate. The AK4114 external clock pin does go to the Xilinx > CPLD. The GPIOs lead to the CPLD too. Do they in some way control the > CPLD to provide AK4114 with external clock so that AK4114 can provide > correct input rate data through its registers? Sorry, I have little idea about Juli (and all ESI boards). The datasheet was given only to Jaroslav (cc'ed) at that time. Takashi _______________________________________________ Alsa-devel mailing list Alsa-devel@xxxxxxxxxxxxxxxx http://mailman.alsa-project.org/mailman/listinfo/alsa-devel
