On 11/16/20 1:58 PM, Mark Brown wrote:
On Mon, Nov 16, 2020 at 02:19:03PM +0800, Michael Sit Wei Hong wrote:
In the Intel KeemBay solution, the DW AXI-based DMA has a limitation on
the number of DMA blocks per transfer. In the case of 16 bit audio ASoC
would allocate blocks exceeding the DMA block limitation.
The ASoC layers are not aware of such DMA limitation, and the DMA engine
does not provide an API to set the maximum number of blocks per linked link.
Can we not extend the dmaengine API so that the ASoC layer (and any
other users) can become aware of this limitation and handle it
appropriately rather than jumping straight to some client driver
specific handling?
This was supposed to be an RFC, I asked Vinod/Lars to be copied for
feedback. Unfortunately the RFC tag is missing and Vinod's email wasn't
the right one... (fixed now).
This patchset suggests an ALSA-only quirk, having other more generic
means to deal with this limitation would be fine - we just wanted to
have a discussion on preferred directions. The IPs used are not
Intel-specific so sooner or later someone else will have similar
limitations to work-around.
