On Fri, Nov 06, 2020 at 07:35:37PM +0000, Mark Brown wrote: > On Thu, Nov 05, 2020 at 08:37:14PM +0000, Parav Pandit wrote: > > > > > This example describes the mlx5 PCI subfunction use case. > > > > I didn't follow your question about 'explicit example'. > > > > What part is missing to identify it as explicit example? > > > > Specifically listing "mlx5" so if someone reading this document thinks to > > > themselves "hey mlx5 sounds like my use case" they can go grep for that. > > > Ah, I see. > > "mlx5" is not listed explicitly, because it is not included in this patchset. > > In various previous discussions in this thread, mlx5 subfunction use case is described that justifies the existence of the bus. > > I will be happy to update this documentation once mlx5 subfunction will be part of kernel so that grep actually shows valid output. > > (waiting to post them as it uses auxiliary bus :-)). > > For ease of review if there's a new version it might be as well to just > reference it anyway, hopefully the mlx5 code will be merged fairly > quickly once the bus itself is merged. It's probably easier all round > than adding the reference later, it seems more likely that mlx5 will get > merged than that it'll fall by the wayside. Another use-case for this patch-set is going to be the habanalabs driver. The GAUDI ASIC is a PCI H/W accelerator for deep-learning which also exposes network ports.We are going to use this auxiliary-bus feature to separate our monolithic driver into several parts that will reside in different subsystems and communicate between them through the bus. Thanks, Oded
