Re: [PATCH] Asoc: qcom: lpass-sc7180: Fix MI2S bitwidth field bit positions

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On 22/10/2020 14:26, Srinivasa Rao Mandadapu wrote:
From: V Sujith Kumar Reddy <vsujithk@xxxxxxxxxxxxxx>

Update SC7180 lpass_variant structure with proper I2S bitwidth
field bit positions, as bitwidth denotes 0 to 1 bits,
but previously used only 0 bit.

Fixes: commit cba62c8b49bead ("Merge series "ASoC: qcom: Add support for SC7180 lpass variant" from Rohit kumar <rohitkr@xxxxxxxxxxxxxx>:")
this should be 12 chars long, for this particular fix it should be!

Fixes: 24caf8d9eb108 ("ASoC: qcom: lpass-sc7180: Add platform driver for lpass audio")


No empty line after Fixes tag!


Signed-off-by: V Sujith Kumar Reddy <vsujithk@xxxxxxxxxxxxxx>
Signed-off-by: Srinivasa Rao Mandadapu <srivasam@xxxxxxxxxxxxxx>
---
  sound/soc/qcom/lpass-sc7180.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sound/soc/qcom/lpass-sc7180.c b/sound/soc/qcom/lpass-sc7180.c
index c6292f9e..bc998d5 100644
--- a/sound/soc/qcom/lpass-sc7180.c
+++ b/sound/soc/qcom/lpass-sc7180.c
@@ -188,7 +188,7 @@ static struct lpass_variant sc7180_data = {
  	.micmode		= REG_FIELD_ID(0x1000, 4, 8, 3, 0x1000),
  	.micmono		= REG_FIELD_ID(0x1000, 3, 3, 3, 0x1000),
  	.wssrc			= REG_FIELD_ID(0x1000, 2, 2, 3, 0x1000),
-	.bitwidth		= REG_FIELD_ID(0x1000, 0, 0, 3, 0x1000),
+	.bitwidth		= REG_FIELD_ID(0x1000, 0, 1, 3, 0x1000),
.rdma_dyncclk = REG_FIELD_ID(0xC000, 21, 21, 5, 0x1000),
  	.rdma_bursten		= REG_FIELD_ID(0xC000, 20, 20, 5, 0x1000),

--srini



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