On Fri, Oct 02, 2020 at 03:35:40PM +0800, Jiaxin Yu wrote: > This patch adds mt8192 audio afe document. > > Signed-off-by: Jiaxin Yu <jiaxin.yu@xxxxxxxxxxxx> > --- > .../bindings/sound/mt8192-afe-pcm.yaml | 98 +++++++++++++++++++ > 1 file changed, 98 insertions(+) > create mode 100644 Documentation/devicetree/bindings/sound/mt8192-afe-pcm.yaml > > diff --git a/Documentation/devicetree/bindings/sound/mt8192-afe-pcm.yaml b/Documentation/devicetree/bindings/sound/mt8192-afe-pcm.yaml > new file mode 100644 > index 0000000000000..43852315f1867 > --- /dev/null > +++ b/Documentation/devicetree/bindings/sound/mt8192-afe-pcm.yaml > @@ -0,0 +1,98 @@ > +# SPDX-License-Identifier: GPL-2.0 Dual license new bindings: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/sound/mt8192-afe-pcm.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Mediatek AFE PCM controller for mt8192 > + > +maintainers: > + - Jiaxin Yu <jiaxin.yu@xxxxxxxxxxxx> > + - Shane Chien <shane.chien@xxxxxxxxxxxx> > + > +properties: > + compatible: > + contains: So any other string in addition is okay? > + const: mediatek,mt8192-audio > + > + interrupts: > + maxItems: 1 > + description: AFE interrupt line Drop description. > + > + resets: > + maxItems: 1 > + > + reset-names: > + const: audiosys > + > + apmixedsys: > + maxItems: 1 This is an array? > + description: The mediatek apmixedsys controller > + > + infracfg: > + maxItems: 1 > + description: The mediatek infracfg controller > + > + topckgen: > + maxItems: 1 > + description: The mediatek topckgen controller These all need a type reference and and vendor prefix. > + > + power-domains: > + maxItems: 1 > + > + clocks: > + items: > + - description: AFE clock > + - description: ADDA DAC clock > + - description: ADDA DAC pre-distortion clock > + - description: audio infra sys clock > + - description: audio infra 26M clock > + > + clock-names: > + items: > + - const: aud_afe_clk > + - const: aud_dac_clk > + - const: aud_dac_predis_clk > + - const: aud_infra_clk > + - const: aud_infra_26m_clk > + > +required: > + - compatible > + - interrupts > + - resets > + - reset-names > + - power-domains > + - clocks > + - clock-names > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/mt8192-clk.h> > + #include <dt-bindings/interrupt-controller/irq.h> > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/power/mt8192-power.h> > + > + afe: mt8192-afe-pcm { > + compatible = "mediatek,mt8192-audio"; > + interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>; > + resets = <&watchdog MT8192_TOPRGU_AUDIO_SW_RST>; > + reset-names = "audiosys"; > + apmixedsys = <&apmixedsys>; > + infracfg = <&infracfg>; > + topckgen = <&topckgen>; > + power-domains = <&scpsys MT8192_POWER_DOMAIN_AUDIO>; > + clocks = <&audsys CLK_AUD_AFE>, > + <&audsys CLK_AUD_DAC>, > + <&audsys CLK_AUD_DAC_PREDIS>, > + <&infracfg CLK_INFRA_AUDIO>, > + <&infracfg CLK_INFRA_AUDIO_26M_B>; > + clock-names = "aud_afe_clk", > + "aud_dac_clk", > + "aud_dac_predis_clk", > + "aud_infra_clk", > + "aud_infra_26m_clk"; > + }; > + > +... > -- > 2.18.0
