On Fri, Sep 04, 2020 at 04:16:49PM +0000, Charles Keepax wrote: > My understanding is physical_width refers to the in memory > representation, but shouldn't be used to control the slot width > on the bus. If not specified otherwise (say through the set_tdm > callback), and if the appropriate BCLK is supported, then the slot > should be just large enough to hold the data. Indeed. The framework isn't great here in tying the memory and wire formats together, ideally there would be more support for them being unrelated without DPCM.
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