Two different constraints are implemented: one is in platform's CPU DAI to enforce the period to be multiple of 1ms to align with firmware design. The other is in Atom Chromebook's machine driver to use 240 as period size which is selected by google. Changes since v1: -Add comma at the end of media_period_size array declaration. Changes since v2: -Use snd_pcm_hw_constraint_step to enforce the 1ms period. Brent Lu (1): ASoC: intel: atom: Add period size constraint Yu-Hsuan Hsu (1): ASoC: Intel: Add period size constraint on strago board sound/soc/intel/atom/sst-mfld-platform-pcm.c | 11 +++++++++++ sound/soc/intel/boards/cht_bsw_max98090_ti.c | 14 +++++++++++++- sound/soc/intel/boards/cht_bsw_rt5645.c | 14 +++++++++++++- 3 files changed, 37 insertions(+), 2 deletions(-) -- 2.7.4
