> > We can potentially reduce the timings here for something shorter although > I'd need to speak with the HW team as to what, if any reduction is feasible. > However this is not a real fix as there's potential for audible noises when you > don't enable WCLK first. As far as I can tell the Intel platforms are capable of > enabling clocks early, as can be seen in this board file with early SCLK enable: > > https://elixir.bootlin.com/linux/latest/source/sound/soc/intel/boards/kbl_rt > 5663_max98927.c#L99 > > I think there's a need to find some method to enable the WCLK signal > otherwise there's the potential for audible artefacts when SRM finally locks > which is not going to be pleasant. > Hi Adam, Thanks for reply. This patch is not fixing any bug. It just shorten the audio latency on our boards. Basically we are idling there for 400ms then print a warning message about SRM not being locked. It seems to me that 400ms is too much even for those platforms which are able to provide WCLK before calling snd_soc_dai_set_pll() function but it relies on your HW team to provide the number. On KBL platform we have interface to control MCLK and I2S clocks like the link you mentioned but WCLK seems not working on my board. I can try to ask if someone is working on it but since we are moving to SOF. The chance is slim for legacy firmware. Regards, Brent _______________________________________________ Alsa-devel mailing list Alsa-devel@xxxxxxxxxxxxxxxx https://mailman.alsa-project.org/mailman/listinfo/alsa-devel
