Re: Recently committed change to kernel 2.6.20.2 breaks snd-hda-intel on AOpen EZ482

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Thanks.  This was actually discovered earlier this week and a change specific to ATI chipsets has been made.  Attached is the new patch that was added to alsa.

Tobin

On Sat, 2007-03-17 at 18:05 +1100, Huw Hawkins wrote:
Hi,
  The change under kernel 2.4.20.2 which reduced the
number of codexs (as in the below bit of the patch
files) from 4 to 3 stops the sound card properly
initialising (failed with an error about not finding
codecs). Bumping it back up to 4 gets me my sound
devices back again.

--------------------------------------------------

diff --git a/sound/pci/hda/hda_intel.c
b/sound/pci/hda/hda_intel.c
index 1a7e821..77f8ec7 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -199,7 +199,7 @@ enum { SDI0, SDI1, SDI2, SDI3,
SDO0, SDO1, SDO2, SDO3 };

 /* STATESTS int mask: SD2,SD1,SD0 */
 #define STATESTS_INT_MASK      0x07
-#define AZX_MAX_CODECS         4
+#define AZX_MAX_CODECS         3

-----------------------------------------------

OUtput os lspci -vv is as follows:

00:14.2 Audio device: ATI Technologies Inc SB450 HDA
Audio (rev 01)
        Subsystem: AOPEN Inc. Unknown device 0569
        Control: I/O- Mem+ BusMaster+ SpecCycle-
MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
        Status: Cap+ 66MHz- UDF- FastB2B- ParErr-
DEVSEL=slow >TAbort- <TAbort- <MAbort- >SERR- <PERR-
        Latency: 64, Cache Line Size: 32 bytes
        Interrupt: pin ? routed to IRQ 16
        Region 0: Memory at fe024000 (64-bit,
non-prefetchable) [size=16K]
        Capabilities: [50] Power Management version 2
                Flags: PMEClk- DSI- D1- D2-
AuxCurrent=55mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
                Status: D0 PME-Enable- DSel=0 DScale=0
PME-
        Capabilities: [60] Message Signalled
Interrupts: Mask- 64bit+ Queue=0/0 Enable-
                Address: 0000000000000000  Data: 0000

----------------------------------------------

  I'm not on this list so please CC me in any reply,
or if more info is required. I couldn't see this in
the bugtrack, although admittedly I didn't look too
hard so appologies if it is known.

Thanks

Huw

huwrh at yahoo dot com dot au

Send instant messages to your online friends http://au.messenger.yahoo.com 

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--
Tobin Davis <tdavis@xxxxxxxxxxxx>
# HG changeset patch
# User tiwai
# Date 1173731446 -3600
# Node ID 5115624fea3145104669f7d94eca6af5c746430a
# Parent e87b2114ceaea19d2d83d646187c01d0ab03cc4e
hda-intel - Fix codec probe with ATI contorllers

ATI controllers may have up to 4 codecs while ICH up to 3.
Thus the earlier fix to change AZX_MAX_CODECS to 3 cause a regression
on some devices that have the audio codec at bit#3.

Now max codecs is defined according to the driver type, either 3 or 4.
Currently 4 is set only to ATI chips.  Other might need the same
change, too.

Patch-level: ASAP

--- a/pci/hda/hda_intel.c	Mon Mar 12 12:54:23 2007 +0100
+++ b/pci/hda/hda_intel.c	Mon Mar 12 21:30:46 2007 +0100
@@ -199,7 +199,6 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO
 
 /* STATESTS int mask: SD2,SD1,SD0 */
 #define STATESTS_INT_MASK	0x07
-#define AZX_MAX_CODECS		3
 
 /* SD_CTL bits */
 #define SD_CTL_STREAM_RESET	0x01	/* stream reset bit */
@@ -966,6 +965,16 @@ static int azx_setup_controller(struct a
  * Codec initialization
  */
 
+static unsigned int azx_max_codecs[] __devinitdata = {
+	[AZX_DRIVER_ICH] = 3,
+	[AZX_DRIVER_ATI] = 4,
+	[AZX_DRIVER_ATIHDMI] = 4,
+	[AZX_DRIVER_VIA] = 3,		/* FIXME: correct? */
+	[AZX_DRIVER_SIS] = 3,		/* FIXME: correct? */
+	[AZX_DRIVER_ULI] = 3,		/* FIXME: correct? */
+	[AZX_DRIVER_NVIDIA] = 3,	/* FIXME: correct? */
+};
+
 static int __devinit azx_codec_create(struct azx *chip, const char *model)
 {
 	struct hda_bus_template bus_temp;
@@ -982,7 +991,7 @@ static int __devinit azx_codec_create(st
 		return err;
 
 	codecs = 0;
-	for (c = 0; c < AZX_MAX_CODECS; c++) {
+	for (c = 0; c < azx_max_codecs[chip->driver_type]; c++) {
 		if ((chip->codec_mask & (1 << c)) & probe_mask) {
 			err = snd_hda_codec_new(chip->bus, c, NULL);
 			if (err < 0)

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