On Sun, 2006-10-29 at 21:47 +1100, Paul Mackerras wrote: > Johannes Berg writes: > > > Maybe we should clear the S0 bit and then check if it's active? > > That's what I do, exactly. Whoops, missed that, sorry. > The possible race is that the DBDMA might see the S0 bit set just > before we clear it, but it will still take a little while for it to do > the branch, fetch the stop command, and execute it. So it is possible > that we clear S0 and then check the ACTIVE bit and see that it is > still set, but in fact the DBDMA did see the S0 bit set and is in the > process of stopping, and if we do nothing it will stop and the input > or output will stall. > > That's why I put the udelay(10) in there. It may be possible to do > better by telling the DBDMA to do a flush and looking at the status > words in the DBDMA command list. If we see the status from the flush > then the DBDMA didn't see S0; if the DBDMA stops before writing out > the status from the flush then it did see it. However, the udelay > seems to work OK and is simple. Yeah, I just missed the S0 clearing, now I understand. Sorry about that. Thanks for clearing it up. So just in case anyone cares Acked-by: Johannes Berg <johannes@xxxxxxxxxxxxxxxx> Thanks a lot, johannes
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