arm64/pgtable: support __HAVE_ARCH_PTE_SWP_EXCLUSIVE
Let's use one of the type bits: core-mm only supports 5, so there is no
need to consume 6.
Note that we might be able to reuse bit 1, but reusing bit 1 turned out
problematic in the past for PROT_NONE handling; so let's play safe and use
another bit.
Link: https://lkml.kernel.org/r/20220329164329.208407-5-david@xxxxxxxxxx
发件人: 陈冠有
发送时间: 2023年9月14日 15:51:31 收件人: crash-utility@xxxxxxxxxx 抄送: lijiang@xxxxxxxxxx; k-hagio-ab@xxxxxxx 主题: [PATCH] Fix "vtop" command to display the swapinfo for arm64 kernel 6.1+
#define __SWP_TYPE_SHIFT 3
#define __SWP_TYPE_BITS 5
Before:
crash> vtop 70504000
VIRTUAL PHYSICAL
70504000 (not mapped)
PAGE DIRECTORY: ffffff80f265c000
PGD: ffffff80f265c008 => 800000141537003
PMD: ffffff8101537c10 => 800000141538003
PTE: ffffff8101538820 => 12bc3e04
PTE vtop: cannot determine swap location
After:
crash> vtop 70504000
VIRTUAL PHYSICAL
70504000 (not mapped)
PAGE DIRECTORY: ffffff80f265c000
PGD: ffffff80f265c008 => 800000141537003
PMD: ffffff8101537c10 => 800000141538003
PTE: ffffff8101538820 => 12bc3e04
PTE SWAP OFFSET
12bc3e04 /first_stage_ramdisk/dev/block/zram0 1227838
VMA START END FLAGS FILE
ffffff80dfe7b578 70504000 707bd000 100073
SWAP: /first_stage_ramdisk/dev/block/zram0 OFFSET: 1227838
Signed-off-by: chenguanyou <chenguanyou@xxxxxxxxxx>
---
arm64.c | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/arm64.c b/arm64.c
index 39d5f04..ea1b51b 100644
--- a/arm64.c
+++ b/arm64.c
@@ -468,8 +468,16 @@ arm64_init(int when)
}
}
-
- if (THIS_KERNEL_VERSION >= LINUX(4,0,0)) {
+ if (THIS_KERNEL_VERSION >= LINUX(6,1,0)) {
+ ms->__SWP_TYPE_BITS = 5;
+ ms->__SWP_TYPE_SHIFT = 3;
+ ms->__SWP_TYPE_MASK = ((1UL << ms->__SWP_TYPE_BITS) - 1);
+ ms->__SWP_OFFSET_SHIFT = (ms->__SWP_TYPE_BITS + ms->__SWP_TYPE_SHIFT);
+ ms->__SWP_OFFSET_BITS = 50;
+ ms->__SWP_OFFSET_MASK = ((1UL << ms->__SWP_OFFSET_BITS) - 1);
+ ms->PTE_PROT_NONE = (1UL << 58);
+ ms->PTE_FILE = 0; /* unused */
+ } else if (THIS_KERNEL_VERSION >= LINUX(4,0,0)) {
ms->__SWP_TYPE_BITS = 6;
ms->__SWP_TYPE_SHIFT = 2;
ms->__SWP_TYPE_MASK = ((1UL << ms->__SWP_TYPE_BITS) - 1);
--
2.39.0
|
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