At 07/16/2018 06:00 PM, Kirill A. Shutemov wrote:
On Mon, Jul 16, 2018 at 01:05:24AM +0000, Dou Liyang wrote:
Dear Kirill,
Sorry to trouble you.
I am trying to make the Crash can parse the kernel with 5-level paging.
I met a problem, seek help.
IMO, all user-sapce tasks must using 5-level paging if the kernel
has been in 5-level paging decided by '__pgtable_l5_enabled=1'. Correct?
There's no way to enable paging mode on per-task basis. It's enabled with
flag in CR4 therefore it's global.
I see,
And, In the Documentation/x86/x86_64/5level-paging.txt:
...
To mitigate this, we are not going to allocate virtual address space
above 47-bit by default.
But userspace can ask for allocation from full address space by
specifying hint address (with or without MAP_FIXED) above 47-bits.
...
I guess it just means that some user-space tasks can't using the address
above 47-bits, it doesn't mean that the tasks will back to use 4-level
paging if the kernel has been in 5-level paging. Is it right?
Right.
Thank you so much. I know what should I do in crash.
Thanks,
dou
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