2012/10/4 Mika Westerberg <mika.westerberg@xxxxxx>: > The unity-mapped region is mapped using 1MB pages. However, we actually have > (when using the Linux ARM 2-level translation scheme): > > see arch/arm/include/asm/pgtable-2level.h: > > #define PMD_SHIFT 21 > #define PGDIR_SHIFT 21 > > #define PTRS_PER_PGD 2048 > > So we have 2048 entries in a PGD instead of 4096 making a PGD entry an array > of "two pointers". > > Anyway as you and Paawan suggested it looks like a bug - we always use the > first entry instead of the second given that bit 20 is set in the virtual > address. Isn't the problem actually that we read the section entry wrong? The following (and attached) is the fix I've been using for this. Rabin diff --git a/arm.c b/arm.c index 5930c02..4e7b6dc 100644 --- a/arm.c +++ b/arm.c @@ -957,12 +957,14 @@ arm_vtop(ulong vaddr, ulong *pgd, physaddr_t *paddr, int verbose) MKSTR((ulong)page_middle)), pmd_pte); if ((pmd_pte & PMD_TYPE_MASK) == PMD_TYPE_SECT) { + ulong sectionbase = pmd_pte & _SECTION_PAGE_MASK; + if (verbose) { fprintf(fp, " PAGE: %s (1MB)\n\n", mkstring(buf, VADDR_PRLEN, RJUST | LONG_HEX, - MKSTR(PAGEBASE(pmd_pte)))); + MKSTR(sectionbase))); } - *paddr = PAGEBASE(pmd_pte) + (vaddr & ~_SECTION_PAGE_MASK); + *paddr = sectionbase + (vaddr & ~_SECTION_PAGE_MASK); return TRUE; }
Attachment:
0001-fix-vtop-Section-handling.patch
Description: Binary data
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