This patch add support fleescale ppce500mc in E500 processor chipset.
And make platform specific code shape-up so that new support can get easy.
Todo:
vtop for kernel vaddr in ppce500mc can not work out yet.
crash> vtop c0000000
VIRTUAL PHYSICAL
c0000000 0
PAGE DIRECTORY: c08d1000
PGD: c08d2800 => 0 # Not mapped from PGD.
- linux/arch/powerpc/mm/fsl_booke_mmu.c
I think if kernel use TLBCAM's fixed map, page table setting are not required?
I'll make up fsl-booke specific physaddr search method later.
Thanks,
Toshi
Toshikazu Nakayama (5):
ppc32: handle PTE size by using gdb datatype request
ppc32: shrink machine_specific
ppc32: handle greater PTE_RPN_SHIFT than PAGE_SHIFT
ppc32: add E500 processor probe function
ppc32: cleanup page table code
defs.h | 59 ++++++++++++++++++++++----------
ppc.c | 118 +++++++++++++++++++++++++++++++++++++--------------------------
2 files changed, 109 insertions(+), 68 deletions(-)
Date: Thu, 15 Mar 2012 13:23:20 +0900
Subject: [PATCH 1/5] ppc32: handle PTE size by using gdb datatype request
PTE 64bit extension is configurable with CONFIG_PTE_64BIT.
Query datatype info for "pte_t" to handle PTE size and check it
when probing platform.
Add info message if CONFIG_PTE_64BIT is y but everyone could not handle.
Report vmalloc failures because of not supported platform like
----
crash: platform "ppce500mc" 64bit PTE fall through
crash: vmalloc translation could not work!
WARNING: cannot access vmalloc'd module memory
----
Signed-off-by: Toshikazu Nakayama <nakayama.ts@xxxxxxxxxxxxxx>
---
defs.h | 2 --
ppc.c | 28 ++++++++++++++++++++--------
2 files changed, 20 insertions(+), 10 deletions(-)
diff --git a/defs.h b/defs.h
index bddf2bc..dbe9867 100755
--- a/defs.h
+++ b/defs.h
@@ -2678,13 +2678,11 @@ struct machine_specific {
#define DEFAULT_PGDIR_SHIFT (22)
#define DEFAULT_PTRS_PER_PTE (1024)
#define DEFAULT_PTRS_PER_PGD (1024)
-#define DEFAULT_PTE_SIZE sizeof(ulong)
/* PPC44x translation bits */
#define PPC44x_PGDIR_SHIFT (21)
#define PPC44x_PTRS_PER_PTE (512)
#define PPC44x_PTRS_PER_PGD (2048)
-#define PPC44x_PTE_SIZE sizeof(ulonglong)
/* PAGE flags */
#define _PAGE_PRESENT (machdep->machspec->_page_present) /* software: pte contains a translation */
diff --git a/ppc.c b/ppc.c
index d23766e..cda2bfa 100755
--- a/ppc.c
+++ b/ppc.c
@@ -97,7 +97,6 @@ probe_ppc44x_platform(char *name)
machspec->pgdir_shift = PPC44x_PGDIR_SHIFT;
machspec->ptrs_per_pgd = PPC44x_PTRS_PER_PGD;
machspec->ptrs_per_pte = PPC44x_PTRS_PER_PTE;
- machspec->pte_size = PPC44x_PTE_SIZE;
machspec->_page_present = PPC44x_PAGE_PRESENT;
machspec->_page_user = PPC44x_PAGE_USER;
@@ -122,13 +121,17 @@ probe_default_platform(char *name)
{
struct machine_specific *machspec = machdep->machspec;
+ if (machdep->flags & PAE) {
+ error(INFO, "platform \"%s\" 64bit PTE fall through\n", name);
+ error(INFO, "vmalloc translation could not work!\n");
+ }
+
/* Use the default definitions */
machspec->platform = strdup(name);
machspec->pgdir_shift = DEFAULT_PGDIR_SHIFT;
machspec->ptrs_per_pgd = DEFAULT_PTRS_PER_PGD;
machspec->ptrs_per_pte = DEFAULT_PTRS_PER_PTE;
- machspec->pte_size = DEFAULT_PTE_SIZE;
machspec->_page_present = DEFAULT_PAGE_PRESENT;
machspec->_page_user = DEFAULT_PAGE_USER;
@@ -179,6 +182,9 @@ ppc_init(int when)
{
uint cpu_features;
ulong cur_cpu_spec;
+ struct datatype_member pte = {
+ .name = "pte_t",
+ };
switch (when)
{
@@ -231,16 +237,21 @@ ppc_init(int when)
machdep->value_to_symbol = generic_machdep_value_to_symbol;
machdep->init_kernel_pgd = NULL;
+ break;
+
+ case POST_GDB:
+ /* gdb interface got available, resolve PTE right now. */
+ machdep->machspec->pte_size = DATATYPE_SIZE(&pte);
+ if (machdep->machspec->pte_size < 0)
+ error(FATAL,
+ "gdb could not handle \"pte_t\" size request\n");
+ /* Check if we have 64bit PTE on 32bit system */
+ if (machdep->machspec->pte_size == sizeof(ulonglong))
+ machdep->flags |= PAE;
/* Find the platform where we crashed */
ppc_probe_base_platform();
machdep->ptrs_per_pgd = PTRS_PER_PGD;
- /* Check if we have 64bit PTE on 32bit system */
- if (PTE_SIZE == sizeof(ulonglong))
- machdep->flags |= PAE;
-
- break;
- case POST_GDB:
machdep->vmalloc_start = ppc_vmalloc_start;
MEMBER_OFFSET_INIT(thread_struct_pg_tables,
"thread_struct", "pg_tables");
@@ -299,6 +310,7 @@ ppc_init(int when)
if ((THIS_KERNEL_VERSION >= LINUX(2,6,0)) &&
symbol_exists("hardirq_ctx"))
STRUCT_SIZE_INIT(irq_ctx, "hardirq_ctx");
+
break;
case POST_INIT:
--
1.7.0.4
Date: Fri, 16 Mar 2012 17:50:44 +0900
Subject: [PATCH 2/5] ppc32: shrink machine_specific
Only if PAGE_SHIFT and PTE_SIZE can be handled,
other staff can be translated with them like kernel headers.
Add 4K base PAGE_SHIFT and remove such staff to shrink
machine_specific or corresponding platform specific parts.
Signed-off-by: Toshikazu Nakayama <nakayama.ts@xxxxxxxxxxxxxx>
---
defs.h | 24 ++++++------------------
ppc.c | 9 ---------
2 files changed, 6 insertions(+), 27 deletions(-)
diff --git a/defs.h b/defs.h
index dbe9867..10de3d5 100755
--- a/defs.h
+++ b/defs.h
@@ -2643,13 +2643,9 @@ struct load_module {
/* Holds the platform specific info for page translation */
struct machine_specific {
-
char *platform;
/* page address translation bits */
- int pgdir_shift;
- int ptrs_per_pgd;
- int ptrs_per_pte;
int pte_size;
/* page flags */
@@ -2664,25 +2660,17 @@ struct machine_specific {
ulong _page_accessed;
ulong _page_hwwrite;
ulong _page_shared;
-
};
/* Page translation bits */
#define PPC_PLATFORM (machdep->machspec->platform)
-#define PGDIR_SHIFT (machdep->machspec->pgdir_shift)
-#define PTRS_PER_PTE (machdep->machspec->ptrs_per_pte)
-#define PTRS_PER_PGD (machdep->machspec->ptrs_per_pgd)
#define PTE_SIZE (machdep->machspec->pte_size)
-
-/* Default values for Page translation */
-#define DEFAULT_PGDIR_SHIFT (22)
-#define DEFAULT_PTRS_PER_PTE (1024)
-#define DEFAULT_PTRS_PER_PGD (1024)
-
-/* PPC44x translation bits */
-#define PPC44x_PGDIR_SHIFT (21)
-#define PPC44x_PTRS_PER_PTE (512)
-#define PPC44x_PTRS_PER_PGD (2048)
+#define PAGE_SHIFT (12)
+#define PTE_T_LOG2 (ffs(PTE_SIZE) - 1)
+#define PTE_SHIFT (PAGE_SHIFT - PTE_T_LOG2)
+#define PGDIR_SHIFT (PAGE_SHIFT + PTE_SHIFT)
+#define PTRS_PER_PGD (1 << (32 - PGDIR_SHIFT))
+#define PTRS_PER_PTE (1 << PTE_SHIFT)
/* PAGE flags */
#define _PAGE_PRESENT (machdep->machspec->_page_present) /* software: pte contains a translation */
diff --git a/ppc.c b/ppc.c
index cda2bfa..c7200d9 100755
--- a/ppc.c
+++ b/ppc.c
@@ -94,10 +94,6 @@ probe_ppc44x_platform(char *name)
machspec->platform = strdup(name);
- machspec->pgdir_shift = PPC44x_PGDIR_SHIFT;
- machspec->ptrs_per_pgd = PPC44x_PTRS_PER_PGD;
- machspec->ptrs_per_pte = PPC44x_PTRS_PER_PTE;
-
machspec->_page_present = PPC44x_PAGE_PRESENT;
machspec->_page_user = PPC44x_PAGE_USER;
machspec->_page_rw = PPC44x_PAGE_RW;
@@ -129,10 +125,6 @@ probe_default_platform(char *name)
/* Use the default definitions */
machspec->platform = strdup(name);
- machspec->pgdir_shift = DEFAULT_PGDIR_SHIFT;
- machspec->ptrs_per_pgd = DEFAULT_PTRS_PER_PGD;
- machspec->ptrs_per_pte = DEFAULT_PTRS_PER_PTE;
-
machspec->_page_present = DEFAULT_PAGE_PRESENT;
machspec->_page_user = DEFAULT_PAGE_USER;
machspec->_page_rw = DEFAULT_PAGE_RW;
@@ -250,7 +242,6 @@ ppc_init(int when)
machdep->flags |= PAE;
/* Find the platform where we crashed */
ppc_probe_base_platform();
- machdep->ptrs_per_pgd = PTRS_PER_PGD;
machdep->vmalloc_start = ppc_vmalloc_start;
MEMBER_OFFSET_INIT(thread_struct_pg_tables,
--
1.7.0.4
Date: Fri, 16 Mar 2012 17:55:54 +0900
Subject: [PATCH 3/5] ppc32: handle greater PTE_RPN_SHIFT than PAGE_SHIFT
In powerpc, pfn_pte() make PTE with PTE_RPN_SHIFT which is
sometimes greater than PAGE_SHIFT order like freescale booke PTE64.
In this case, mk_pte() also return greater value than physical address.
Translate pte into physical address.
static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot) {
return __pte(((pte_basic_t)(pfn) << PTE_RPN_SHIFT) |
pgprot_val(pgprot)); }
Signed-off-by: Toshikazu Nakayama <nakayama.ts@xxxxxxxxxxxxxx>
---
defs.h | 2 ++
ppc.c | 14 +++++++++++++-
2 files changed, 15 insertions(+), 1 deletions(-)
diff --git a/defs.h b/defs.h
index 10de3d5..9bb2d84 100755
--- a/defs.h
+++ b/defs.h
@@ -2647,6 +2647,7 @@ struct machine_specific {
/* page address translation bits */
int pte_size;
+ int pte_rpn_shift;
/* page flags */
ulong _page_present;
@@ -2665,6 +2666,7 @@ struct machine_specific {
/* Page translation bits */
#define PPC_PLATFORM (machdep->machspec->platform)
#define PTE_SIZE (machdep->machspec->pte_size)
+#define PTE_RPN_SHIFT (machdep->machspec->pte_rpn_shift)
#define PAGE_SHIFT (12)
#define PTE_T_LOG2 (ffs(PTE_SIZE) - 1)
#define PTE_SHIFT (PAGE_SHIFT - PTE_T_LOG2)
diff --git a/ppc.c b/ppc.c
index c7200d9..4bff189 100755
--- a/ppc.c
+++ b/ppc.c
@@ -242,6 +242,8 @@ ppc_init(int when)
machdep->flags |= PAE;
/* Find the platform where we crashed */
ppc_probe_base_platform();
+ if (!machdep->machspec->pte_rpn_shift)
+ machdep->machspec->pte_rpn_shift = PAGE_SHIFT;
machdep->vmalloc_start = ppc_vmalloc_start;
MEMBER_OFFSET_INIT(thread_struct_pg_tables,
@@ -335,6 +337,7 @@ ppc_dump_machdep_table(ulong arg)
fprintf(fp, " ptrs_per_pgd: %d\n", PTRS_PER_PGD);
fprintf(fp, " ptrs_per_pte: %d\n", PTRS_PER_PTE);
fprintf(fp, " pte_size: %d\n", PTE_SIZE);
+ fprintf(fp, " pte_rpn_shift: %d\n", PTE_RPN_SHIFT);
fprintf(fp, " stacksize: %ld\n", machdep->stacksize);
fprintf(fp, " hz: %d\n", machdep->hz);
fprintf(fp, " mhz: %ld\n", machdep->mhz);
@@ -381,6 +384,15 @@ ppc_dump_machdep_table(ulong arg)
fprintf(fp, " machspec: %lx\n", (ulong)machdep->machspec);
}
+static ulonglong
+ppc_pte_physaddr(ulonglong pte)
+{
+ pte = pte >> PTE_RPN_SHIFT; /* pfn */
+ pte = pte << PAGE_SHIFT; /* physaddr */
+
+ return pte;
+}
+
static int
ppc_pgd_vtop(ulong *pgd, ulong vaddr, physaddr_t *paddr, int verbose)
{
@@ -445,7 +457,7 @@ ppc_pgd_vtop(ulong *pgd, ulong vaddr, physaddr_t *paddr, int verbose)
ppc_translate_pte((ulong)pte, 0, pte);
}
- *paddr = PAGEBASE(pte) + PAGEOFFSET(vaddr);
+ *paddr = PAGEBASE(ppc_pte_physaddr(pte)) + PAGEOFFSET(vaddr);
return TRUE;
--
1.7.0.4
Date: Fri, 16 Mar 2012 18:19:13 +0900
Subject: [PATCH 4/5] ppc32: add E500 processor probe function
Current support is ppce500mc platform of Freescale BOOKE.
Wrote both PTE32and PTE64 according by kernel powerpc pgtable header.
#elif defined(CONFIG_FSL_BOOKE) && defined(CONFIG_PTE_64BIT)
#include <asm/pte-book3e.h>
#elif defined(CONFIG_FSL_BOOKE)
#include <asm/pte-fsl-booke.h>
Signed-off-by: Toshikazu Nakayama <nakayama.ts@xxxxxxxxxxxxxx>
---
defs.h | 33 +++++++++++++++++++++++++++++++++
ppc.c | 40 ++++++++++++++++++++++++++++++++++++++++
2 files changed, 73 insertions(+), 0 deletions(-)
diff --git a/defs.h b/defs.h
index 9bb2d84..2c8fae1 100755
--- a/defs.h
+++ b/defs.h
@@ -2674,6 +2674,9 @@ struct machine_specific {
#define PTRS_PER_PGD (1 << (32 - PGDIR_SHIFT))
#define PTRS_PER_PTE (1 << PTE_SHIFT)
+/* PFN shifts */
+#define BOOKE3E_PTE_RPN_SHIFT (24)
+
/* PAGE flags */
#define _PAGE_PRESENT (machdep->machspec->_page_present) /* software: pte contains a translation */
#define _PAGE_USER (machdep->machspec->_page_user) /* matches one of the PP bits */
@@ -2713,6 +2716,36 @@ struct machine_specific {
#define PPC44x_PAGE_HWWRITE 0
#define PPC44x_PAGE_SHARED 0
+/* BOOK3E */
+#define BOOK3E_PAGE_PRESENT 0x000001
+#define BOOK3E_PAGE_BAP_SR 0x000004
+#define BOOK3E_PAGE_BAP_UR 0x000008 /* User Readable */
+#define BOOK3E_PAGE_BAP_SW 0x000010
+#define BOOK3E_PAGE_BAP_UW 0x000020 /* User Writable */
+#define BOOK3E_PAGE_USER BOOK3E_PAGE_BAP_SR | BOOK3E_PAGE_BAP_UR
+#define BOOK3E_PAGE_RW BOOK3E_PAGE_BAP_SW | BOOK3E_PAGE_BAP_UW
+#define BOOK3E_PAGE_DIRTY 0x001000
+#define BOOK3E_PAGE_ACCESSED 0x040000
+#define BOOK3E_PAGE_GUARDED 0x100000
+#define BOOK3E_PAGE_COHERENT 0x200000
+#define BOOK3E_PAGE_NO_CACHE 0x400000
+#define BOOK3E_PAGE_WRITETHRU 0x800000
+#define BOOK3E_PAGE_HWWRITE 0
+#define BOOK3E_PAGE_SHARED 0
+
+/* FSL BOOKE */
+#define FSL_BOOKE_PAGE_PRESENT 0x00001
+#define FSL_BOOKE_PAGE_USER 0x00002
+#define FSL_BOOKE_PAGE_RW 0x00004
+#define FSL_BOOKE_PAGE_DIRTY 0x00008
+#define FSL_BOOKE_PAGE_ACCESSED 0x00020
+#define FSL_BOOKE_PAGE_GUARDED 0x00080
+#define FSL_BOOKE_PAGE_COHERENT 0x00100
+#define FSL_BOOKE_PAGE_NO_CACHE 0x00200
+#define FSL_BOOKE_PAGE_WRITETHRU 0x00400
+#define FSL_BOOKE_PAGE_HWWRITE 0
+#define FSL_BOOKE_PAGE_SHARED 0
+
#define SWP_TYPE(entry) (((entry) >> 1) & 0x7f)
#define SWP_OFFSET(entry) ((entry) >> 8)
#define __swp_type(entry) SWP_TYPE(entry)
diff --git a/ppc.c b/ppc.c
index 4bff189..d74957f 100755
--- a/ppc.c
+++ b/ppc.c
@@ -74,12 +74,14 @@ static struct line_number_hook ppc_line_number_hooks[];
static struct machine_specific ppc_machine_specific = { 0 };
static int probe_default_platform(char *);
static int probe_ppc44x_platform(char *);
+static int probe_ppce500_platform(char *);
static void ppc_probe_base_platform(void);
typedef int (*probe_func_t) (char *);
probe_func_t probe_platforms[] = {
probe_ppc44x_platform, /* 44x chipsets */
+ probe_ppce500_platform, /* E500 chipsets */
probe_default_platform, /* This should be at the end */
NULL
};
@@ -113,6 +115,44 @@ probe_ppc44x_platform(char *name)
}
static int
+probe_ppce500_platform(char *name)
+{
+ struct machine_specific *machspec = machdep->machspec;
+
+ if (STRNEQ(name, "ppce500mc")) {
+ machspec->platform = strdup(name);
+ if (machdep->flags & PAE) {
+ machspec->pte_rpn_shift = BOOKE3E_PTE_RPN_SHIFT;
+
+ machspec->_page_present = BOOK3E_PAGE_PRESENT;
+ machspec->_page_user = BOOK3E_PAGE_USER;
+ machspec->_page_rw = BOOK3E_PAGE_RW;
+ machspec->_page_dirty = BOOK3E_PAGE_DIRTY;
+ machspec->_page_accessed = BOOK3E_PAGE_ACCESSED;
+ machspec->_page_guarded = BOOK3E_PAGE_GUARDED;
+ machspec->_page_coherent = BOOK3E_PAGE_COHERENT;
+ machspec->_page_no_cache = BOOK3E_PAGE_NO_CACHE;
+ machspec->_page_writethru = BOOK3E_PAGE_WRITETHRU;
+ } else {
+ machspec->_page_present = FSL_BOOKE_PAGE_PRESENT;
+ machspec->_page_user = FSL_BOOKE_PAGE_USER;
+ machspec->_page_rw = FSL_BOOKE_PAGE_RW;
+ machspec->_page_dirty = FSL_BOOKE_PAGE_DIRTY;
+ machspec->_page_accessed = FSL_BOOKE_PAGE_ACCESSED;
+ machspec->_page_guarded = FSL_BOOKE_PAGE_GUARDED;
+ machspec->_page_coherent = FSL_BOOKE_PAGE_COHERENT;
+ machspec->_page_no_cache = FSL_BOOKE_PAGE_NO_CACHE;
+ machspec->_page_writethru = FSL_BOOKE_PAGE_WRITETHRU;
+ }
+ machspec->_page_hwwrite = 0;
+ machspec->_page_shared = 0;
+
+ return TRUE;
+ }
+ return FALSE;
+}
+
+static int
probe_default_platform(char *name)
{
struct machine_specific *machspec = machdep->machspec;
--
1.7.0.4
Date: Mon, 19 Mar 2012 18:20:27 +0900
Subject: [PATCH 5/5] ppc32: cleanup page table code
Use use macro accessor insted of machdep->machspec->xxx as possible.
Shrink page flags setup code by using macro.
Comparing sizeof(ulonglong) is only once, use PAE flag.
Signed-off-by: Toshikazu Nakayama <nakayama.ts@xxxxxxxxxxxxxx>
---
ppc.c | 95 ++++++++++++++++++++--------------------------------------------
1 files changed, 30 insertions(+), 65 deletions(-)
diff --git a/ppc.c b/ppc.c
index d74957f..3e11664 100755
--- a/ppc.c
+++ b/ppc.c
@@ -86,27 +86,26 @@ probe_func_t probe_platforms[] = {
NULL
};
+/* Don't forget page flags definitions for each platform */
+#define PLATFORM_PAGE_FLAGS_SETUP(PLT) \
+ _PAGE_PRESENT = PLT##_PAGE_PRESENT; \
+ _PAGE_USER = PLT##_PAGE_USER; \
+ _PAGE_RW = PLT##_PAGE_RW; \
+ _PAGE_GUARDED = PLT##_PAGE_GUARDED; \
+ _PAGE_COHERENT = PLT##_PAGE_COHERENT; \
+ _PAGE_NO_CACHE = PLT##_PAGE_NO_CACHE; \
+ _PAGE_WRITETHRU = PLT##_PAGE_WRITETHRU; \
+ _PAGE_DIRTY = PLT##_PAGE_DIRTY; \
+ _PAGE_ACCESSED = PLT##_PAGE_ACCESSED; \
+ _PAGE_HWWRITE = PLT##_PAGE_HWWRITE; \
+ _PAGE_SHARED = PLT##_PAGE_SHARED;
static int
probe_ppc44x_platform(char *name)
{
- struct machine_specific *machspec = machdep->machspec;
-
/* 44x include ppc440* and ppc470 */
if (STRNEQ(name, "ppc440") || STREQ(name, "ppc470")) {
-
- machspec->platform = strdup(name);
-
- machspec->_page_present = PPC44x_PAGE_PRESENT;
- machspec->_page_user = PPC44x_PAGE_USER;
- machspec->_page_rw = PPC44x_PAGE_RW;
- machspec->_page_guarded = PPC44x_PAGE_GUARDED;
- machspec->_page_coherent = PPC44x_PAGE_COHERENT;
- machspec->_page_no_cache = PPC44x_PAGE_NO_CACHE;
- machspec->_page_writethru = PPC44x_PAGE_WRITETHRU;
- machspec->_page_dirty = PPC44x_PAGE_DIRTY;
- machspec->_page_accessed = PPC44x_PAGE_ACCESSED;
- machspec->_page_hwwrite = PPC44x_PAGE_HWWRITE;
- machspec->_page_shared = PPC44x_PAGE_SHARED;
+ PPC_PLATFORM = strdup(name);
+ PLATFORM_PAGE_FLAGS_SETUP(PPC44x);
return TRUE;
}
@@ -117,35 +116,13 @@ probe_ppc44x_platform(char *name)
static int
probe_ppce500_platform(char *name)
{
- struct machine_specific *machspec = machdep->machspec;
-
if (STRNEQ(name, "ppce500mc")) {
- machspec->platform = strdup(name);
+ PPC_PLATFORM = strdup(name);
if (machdep->flags & PAE) {
- machspec->pte_rpn_shift = BOOKE3E_PTE_RPN_SHIFT;
-
- machspec->_page_present = BOOK3E_PAGE_PRESENT;
- machspec->_page_user = BOOK3E_PAGE_USER;
- machspec->_page_rw = BOOK3E_PAGE_RW;
- machspec->_page_dirty = BOOK3E_PAGE_DIRTY;
- machspec->_page_accessed = BOOK3E_PAGE_ACCESSED;
- machspec->_page_guarded = BOOK3E_PAGE_GUARDED;
- machspec->_page_coherent = BOOK3E_PAGE_COHERENT;
- machspec->_page_no_cache = BOOK3E_PAGE_NO_CACHE;
- machspec->_page_writethru = BOOK3E_PAGE_WRITETHRU;
- } else {
- machspec->_page_present = FSL_BOOKE_PAGE_PRESENT;
- machspec->_page_user = FSL_BOOKE_PAGE_USER;
- machspec->_page_rw = FSL_BOOKE_PAGE_RW;
- machspec->_page_dirty = FSL_BOOKE_PAGE_DIRTY;
- machspec->_page_accessed = FSL_BOOKE_PAGE_ACCESSED;
- machspec->_page_guarded = FSL_BOOKE_PAGE_GUARDED;
- machspec->_page_coherent = FSL_BOOKE_PAGE_COHERENT;
- machspec->_page_no_cache = FSL_BOOKE_PAGE_NO_CACHE;
- machspec->_page_writethru = FSL_BOOKE_PAGE_WRITETHRU;
- }
- machspec->_page_hwwrite = 0;
- machspec->_page_shared = 0;
+ PTE_RPN_SHIFT = BOOKE3E_PTE_RPN_SHIFT;
+ PLATFORM_PAGE_FLAGS_SETUP(BOOK3E);
+ } else
+ PLATFORM_PAGE_FLAGS_SETUP(FSL_BOOKE);
return TRUE;
}
@@ -155,32 +132,20 @@ probe_ppce500_platform(char *name)
static int
probe_default_platform(char *name)
{
- struct machine_specific *machspec = machdep->machspec;
-
if (machdep->flags & PAE) {
error(INFO, "platform \"%s\" 64bit PTE fall through\n", name);
error(INFO, "vmalloc translation could not work!\n");
}
/* Use the default definitions */
- machspec->platform = strdup(name);
-
- machspec->_page_present = DEFAULT_PAGE_PRESENT;
- machspec->_page_user = DEFAULT_PAGE_USER;
- machspec->_page_rw = DEFAULT_PAGE_RW;
- machspec->_page_guarded = DEFAULT_PAGE_GUARDED;
- machspec->_page_coherent = DEFAULT_PAGE_COHERENT;
- machspec->_page_no_cache = DEFAULT_PAGE_NO_CACHE;
- machspec->_page_writethru = DEFAULT_PAGE_WRITETHRU;
- machspec->_page_dirty = DEFAULT_PAGE_DIRTY;
- machspec->_page_accessed = DEFAULT_PAGE_ACCESSED;
- machspec->_page_hwwrite = DEFAULT_PAGE_HWWRITE;
- machspec->_page_shared = DEFAULT_PAGE_SHARED;
-
+ PPC_PLATFORM = strdup(name);
+ PLATFORM_PAGE_FLAGS_SETUP(DEFAULT);
return TRUE;
}
+#undef PLATFORM_PAGE_FLAGS_SETUP
+
/*
* Find the platform of the crashing system and set the
* base_platform accordingly.
@@ -273,17 +238,17 @@ ppc_init(int when)
case POST_GDB:
/* gdb interface got available, resolve PTE right now. */
- machdep->machspec->pte_size = DATATYPE_SIZE(&pte);
- if (machdep->machspec->pte_size < 0)
+ PTE_SIZE = DATATYPE_SIZE(&pte);
+ if (PTE_SIZE < 0)
error(FATAL,
"gdb could not handle \"pte_t\" size request\n");
/* Check if we have 64bit PTE on 32bit system */
- if (machdep->machspec->pte_size == sizeof(ulonglong))
+ if (PTE_SIZE == sizeof(ulonglong))
machdep->flags |= PAE;
/* Find the platform where we crashed */
ppc_probe_base_platform();
- if (!machdep->machspec->pte_rpn_shift)
- machdep->machspec->pte_rpn_shift = PAGE_SHIFT;
+ if (!PTE_RPN_SHIFT)
+ PTE_RPN_SHIFT = PAGE_SHIFT;
machdep->vmalloc_start = ppc_vmalloc_start;
MEMBER_OFFSET_INIT(thread_struct_pg_tables,
@@ -475,7 +440,7 @@ ppc_pgd_vtop(ulong *pgd, ulong vaddr, physaddr_t *paddr, int verbose)
(ulong)page_table);
FILL_PTBL(PAGEBASE((ulong)page_table), KVADDR, PAGESIZE());
- if (PTE_SIZE == sizeof(ulonglong))
+ if (machdep->flags & PAE)
pte = ULONGLONG(machdep->ptbl + PAGEOFFSET((ulong)page_table));
else /* Defaults to ulong */
--
1.7.0.4
--
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