On Tue, Feb 25, 2025 at 04:22:49PM +0000, Richard Fitzgerald wrote: > Ok. It was a very long time ago. > Do you want a V2 with a commit message that doesn't libel the SPI > framework? No, it's fine - it's in CI already. > FWIW switching to sync write reduced the download of small amp firmware > by 200ms on a 1.67MHz SPI bus. Yeah, with modern multi-core systems that's unsurprising especially with a controller that does small writes synchronously - the cost of locking on modern CPUs tends to blow out the overlapping of the formatting with the I/O. It's part of why maple tree caches don't do async writes during sync.
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