On 1/2/25 10:58 AM, Michael Walle wrote:
Hi,
Hi,
..Which is the
normal use case for this pin. This driver was created because the
LS1028A doesn't have a MCLK pin, so we've "misused" the BCLK pin,
with the restriction that only integer dividers are possible.
I have a system that is wired a bit unfortunately, I need to source
codec clock, where the codec is the clock consumer and needs to be able
to control the clock (SGTL5000). SAI MCLK is the only way I can get them
out of the pin I need, hence this patch.
Which is also the default case, no?
Not quite, there is a difference.
If SAI (audio driver) is used to control the MCLK enablement, then MCLK
clock is not always enabled, and it is not necessarily enabled when the
codec may need the clock to be enabled. There is also no way for the
codec node to specify phandle to clock provider in DT, because the SAI
(audio driver) is not clock provider.
If SAI (clock driver) is used to control the MCLK enablement, then MCLK
clock is enabled when the codec needs the clock enabled, because the
codec is the clock consumer and the SAI (clock driver) is the clock
provider, and the codec driver can request the clock to be enabled when
needed. There is also the usual phandle to clock provider in DT, because
the SAI (clock driver) is clock provider.
Also I'd expect that the imx
SoCs already supports the MCLK for audio applications. Isn't that
the case?
That does not work if the MCLK has to be enabled/disabled by the MCLK
clock consumer .
Why's that?
Don't get me wrong. I don't have anything against this patch, I'm
just confused, why that isn't already working with the current MCLK
driver as this seems to be the usual requirements.
Which current MCLK driver, the SAI in audio driver role ?
Does the paragraph in the middle of this email possibly answer this
question ?
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