On 12/26/24 4:30 PM, Marek Vasut wrote:
The i.MX8M Mini/Nano/Plus variant of the SAI IP has control registers shifted by +8 bytes, add support for the i.MX8M Mini variant of the IP with this register shift.
Ugh, V2 with updated commit message is coming.
- References:
- [PATCH 1/4] dt-bindings: clock: fsl-sai: Document i.MX8M support
- From: Marek Vasut
- [PATCH 2/4] clk: fsl-sai: Add i.MX8M Mini support with 8 byte register offset
- From: Marek Vasut
- [PATCH 1/4] dt-bindings: clock: fsl-sai: Document i.MX8M support
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