On Mon, Jan 29, 2024 at 03:35:34PM +0100, Krzysztof Kozlowski wrote: > Starting with Qualcomm SM8350 SoC, so Low Power Audio SubSystem (LPASS) > block version v9.2, the register responsible for TX SMIC MUXn muxes is > different. In earlier LPASS versions this mux had bit fields for > analogue (ADCn) and digital (SWR_DMICn) MICs. Choice of ADCn was > selecting the analogue path in CDC_TX_TOP_CSR_SWR_DMICn_CTL register. This doesn't apply against current code, please check and resend.
Attachment:
signature.asc
Description: PGP signature
- References:
- [PATCH v3 0/2] ASoC: codecs: tx-macro: correct TX SMIC MUXn widgets on SM8350+
- From: Krzysztof Kozlowski
- [PATCH v3 2/2] ASoC: codecs: tx-macro: correct TX SMIC MUXn widgets on SM8350+
- From: Krzysztof Kozlowski
- [PATCH v3 0/2] ASoC: codecs: tx-macro: correct TX SMIC MUXn widgets on SM8350+
- Prev by Date: Re: [PATCH] ALSA: pcm: clarify and fix default msbits value for all formats
- Next by Date: Re: [PATCH] dt-bindings: i2c: Remove obsolete i2c.txt
- Previous by thread: [PATCH v3 2/2] ASoC: codecs: tx-macro: correct TX SMIC MUXn widgets on SM8350+
- Next by thread: Re: [PATCH v3 0/2] ASoC: codecs: tx-macro: correct TX SMIC MUXn widgets on SM8350+
- Index(es):