Re: Add hyperthreaded sibling info to virsh capabilities

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On Wed, Oct 17, 2012 at 5:34 PM, Eric Blake <eblake@xxxxxxxxxx> wrote:
> On 10/17/2012 03:06 PM, Dusty Mabe wrote:
>> Hi,
>>
>> Would it be possible to augment the output produced in virsh
>> capabilities to also provide the hyperthreaded sibling of a processor?
>> For example the information would look something like:
>>
>>
>>     <topology>
>>
>>       <cells num='2'>
>>         <cell id='0'>
>>           <cpus num='8'>
>>             <cpu id='1' sibling='9'/>
>
> Indeed, that sounds useful, and it is strictly additive so there is no
> technical reason preventing that addition.
>


Along the same lines, I am considering adding numacell memory
information to this output. Some options for formatted output would
be:

<topology>
  <cells num='2'>
    <cell id='0' memoryKB='8386504'>
      <cpus num='8'>
        <cpu id='1' sibling='9'/>
         .
         .
      </cpus>
    </cell>
  </cells>
</topology>


or, more similar to the guest xml

<topology>
  <cells num='2'>
    <cell id='0'>
      <memory unit='KiB'>8386504</memory>
      <cpus num='8'>
        <cpu id='1' sibling='9'/>
         .
         .
      </cpus>
    </cell>
  </cells>
</topology>


There are a lot of options here for how to format the output. I don't
anticipate the unit of KiB to change since that is what is in the
/sys/devices/system/node/node0/meminfo files.


Thoughts?

Dusty

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