[PATCH] Reserve PCI addresses 3 and 4 on qemu-system-ppc

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On PPC emulated by recent versions of qemu, PCI-bus 0 already has a
macio connected in slot 3 and OHCI on slot 4.

Reference:
- https://bugzilla.redhat.com/show_bug.cgi?id=667345

Signed-off-by: Niels de Vos <ndevos@xxxxxxxxxx>
---
Imho this patch is relatively ugly. Unfortunately I did not find a better
way of changing the reserved PCI-addresses on a per architecture basis. It
can well be that qemuAssignDevicePCISlots() needs to be updated for other
architectures as well. A more modular/dynamic approach might be more
suitable.

Feel free to suggest an alternative way to solve this. Thanks,
Niels


 src/qemu/qemu_command.c |    8 ++++++++
 1 files changed, 8 insertions(+), 0 deletions(-)

diff --git a/src/qemu/qemu_command.c b/src/qemu/qemu_command.c
index f78ce71..50e3ad7 100644
--- a/src/qemu/qemu_command.c
+++ b/src/qemu/qemu_command.c
@@ -983,6 +983,14 @@ qemuAssignDevicePCISlots(virDomainDefPtr def, qemuDomainPCIAddressSetPtr addrs)
             goto error;
     }
 
+    /* qemu-system-ppc has macio on slot 3 and ohci on slot 4 */
+    if (STREQ(def->os.arch, "ppc")) {
+        if (qemuDomainPCIAddressReserveSlot(addrs, 3) < 0)
+            goto error;
+        if (qemuDomainPCIAddressReserveSlot(addrs, 4) < 0)
+            goto error;
+    }
+
     /* Network interfaces */
     for (i = 0; i < def->nnets ; i++) {
         if (def->nets[i]->info.type != VIR_DOMAIN_DEVICE_ADDRESS_TYPE_NONE)
-- 
1.7.4

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