[PATCH v3 22/29] domain_validate.c: allow targetIndex 0 out of idx 0 for PowerNV PHBs

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PowerNV PHBs uses the 'targetIndex' attribute in a different manner than
pSeries PHBs, having no restiction of targetIndex = 0 in controllers
with non-zero indexes.

This can happen when the domain has 2 or more sockets and the pnv-phb3
controller can have targetIndex=0 in a different chip-id.

Signed-off-by: Daniel Henrique Barboza <danielhb413@xxxxxxxxx>
---
 src/conf/domain_validate.c                    |  5 ++-
 src/qemu/qemu_domain.c                        |  2 +-
 src/qemu/qemu_validate.c                      |  5 +++
 .../powernv8-two-sockets.ppc64-latest.args    | 35 +++++++++++++++++
 .../qemuxml2argvdata/powernv8-two-sockets.xml | 26 +++++++++++++
 tests/qemuxml2argvtest.c                      |  1 +
 .../powernv8-two-sockets.ppc64-latest.xml     | 39 +++++++++++++++++++
 tests/qemuxml2xmltest.c                       |  1 +
 8 files changed, 111 insertions(+), 3 deletions(-)
 create mode 100644 tests/qemuxml2argvdata/powernv8-two-sockets.ppc64-latest.args
 create mode 100644 tests/qemuxml2argvdata/powernv8-two-sockets.xml
 create mode 100644 tests/qemuxml2xmloutdata/powernv8-two-sockets.ppc64-latest.xml

diff --git a/src/conf/domain_validate.c b/src/conf/domain_validate.c
index f0b8aa2655..27febb7074 100644
--- a/src/conf/domain_validate.c
+++ b/src/conf/domain_validate.c
@@ -1055,8 +1055,9 @@ virDomainControllerDefValidate(const virDomainControllerDef *controller)
                 return -1;
             }
 
-            if ((controller->idx == 0 && opts->targetIndex != 0) ||
-                (controller->idx != 0 && opts->targetIndex == 0)) {
+            if (!virDomainControllerIsPowerNVPHB(controller) &&
+                ((controller->idx == 0 && opts->targetIndex != 0) ||
+                 (controller->idx != 0 && opts->targetIndex == 0))) {
                 virReportError(VIR_ERR_CONFIG_UNSUPPORTED, "%s",
                                _("Only the PCI controller with index 0 can "
                                  "have target index 0, and vice versa"));
diff --git a/src/qemu/qemu_domain.c b/src/qemu/qemu_domain.c
index 4cf030c485..2257419cbc 100644
--- a/src/qemu/qemu_domain.c
+++ b/src/qemu/qemu_domain.c
@@ -5112,7 +5112,7 @@ qemuDomainControllerDefPostParse(virDomainControllerDef *cont,
 
         /* pSeries guests can have multiple pci-root controllers,
          * but other machine types only support a single one */
-        if (!qemuDomainIsPSeries(def) &&
+        if (!qemuDomainIsPowerPC(def) &&
             (cont->model == VIR_DOMAIN_CONTROLLER_MODEL_PCI_ROOT ||
              cont->model == VIR_DOMAIN_CONTROLLER_MODEL_PCIE_ROOT) &&
             cont->idx != 0) {
diff --git a/src/qemu/qemu_validate.c b/src/qemu/qemu_validate.c
index ad1deb9b56..a172d395aa 100644
--- a/src/qemu/qemu_validate.c
+++ b/src/qemu/qemu_validate.c
@@ -3701,6 +3701,11 @@ qemuValidateDomainDeviceDefControllerPCI(const virDomainControllerDef *cont,
             break;
         }
 
+        /* PowerNV domains, like pSeries guest, can also have
+         * multiple PHBs. */
+        if (virDomainControllerIsPowerNVPHB(cont))
+            break;
+
         /* For all other pci-root and pcie-root controllers, though,
          * the index must be zero */
         if (cont->idx != 0) {
diff --git a/tests/qemuxml2argvdata/powernv8-two-sockets.ppc64-latest.args b/tests/qemuxml2argvdata/powernv8-two-sockets.ppc64-latest.args
new file mode 100644
index 0000000000..67f0611d79
--- /dev/null
+++ b/tests/qemuxml2argvdata/powernv8-two-sockets.ppc64-latest.args
@@ -0,0 +1,35 @@
+LC_ALL=C \
+PATH=/bin \
+HOME=/tmp/lib/domain--1-QEMUGuest1 \
+USER=test \
+LOGNAME=test \
+XDG_DATA_HOME=/tmp/lib/domain--1-QEMUGuest1/.local/share \
+XDG_CACHE_HOME=/tmp/lib/domain--1-QEMUGuest1/.cache \
+XDG_CONFIG_HOME=/tmp/lib/domain--1-QEMUGuest1/.config \
+/usr/bin/qemu-system-ppc64 \
+-name guest=QEMUGuest1,debug-threads=on \
+-S \
+-object '{"qom-type":"secret","id":"masterKey0","format":"raw","file":"/tmp/lib/domain--1-QEMUGuest1/master-key.aes"}' \
+-machine powernv8,usb=off,dump-guest-core=off,memory-backend=pnv.ram \
+-accel tcg \
+-cpu POWER8 \
+-m 2048 \
+-object '{"qom-type":"memory-backend-ram","id":"pnv.ram","size":2147483648}' \
+-overcommit mem-lock=off \
+-smp 2,sockets=2,dies=1,cores=1,threads=1 \
+-uuid b20fcfe3-4a0a-4039-8735-9e024256e0f7 \
+-display none \
+-no-user-config \
+-nodefaults \
+-chardev socket,id=charmonitor,fd=1729,server=on,wait=off \
+-mon chardev=charmonitor,id=monitor,mode=control \
+-rtc base=utc \
+-no-shutdown \
+-boot strict=on \
+-device '{"driver":"pnv-phb3","index":0,"chip-id":0,"id":"pcie.0"}' \
+-device '{"driver":"pnv-phb3","index":0,"chip-id":1,"id":"pcie.1"}' \
+-usb \
+-chardev pty,id=charserial0 \
+-device '{"driver":"isa-serial","chardev":"charserial0","id":"serial0","index":0}' \
+-audiodev '{"id":"audio1","driver":"none"}' \
+-msg timestamp=on
diff --git a/tests/qemuxml2argvdata/powernv8-two-sockets.xml b/tests/qemuxml2argvdata/powernv8-two-sockets.xml
new file mode 100644
index 0000000000..c6f2024a33
--- /dev/null
+++ b/tests/qemuxml2argvdata/powernv8-two-sockets.xml
@@ -0,0 +1,26 @@
+<domain type='qemu'>
+  <name>QEMUGuest1</name>
+  <uuid>b20fcfe3-4a0a-4039-8735-9e024256e0f7</uuid>
+  <memory unit='KiB'>2097152</memory>
+  <vcpu placement='static'>2</vcpu>
+  <os>
+    <type arch='ppc64' machine='powernv8'>hvm</type>
+  </os>
+  <cpu>
+    <topology sockets='2' dies='1' cores='1' threads='1'/>
+  </cpu>
+  <devices>
+    <emulator>/usr/bin/qemu-system-ppc64</emulator>
+    <controller type='pci' index='0' model='pcie-root'>
+      <model name='pnv-phb3'/>
+      <target index='0' chip-id='0'/>
+    </controller>
+    <controller type='pci' index='1' model='pcie-root'>
+      <model name='pnv-phb3'/>
+      <target index='0' chip-id='1'/>
+    </controller>
+    <console type='pty'>
+      <target type='serial' port='0'/>
+    </console>
+  </devices>
+</domain>
diff --git a/tests/qemuxml2argvtest.c b/tests/qemuxml2argvtest.c
index 2da767e2bc..d688004251 100644
--- a/tests/qemuxml2argvtest.c
+++ b/tests/qemuxml2argvtest.c
@@ -2177,6 +2177,7 @@ mymain(void)
 
     DO_TEST_CAPS_ARCH_LATEST("powernv8-basic", "ppc64");
     DO_TEST_CAPS_ARCH_LATEST("powernv8-root-port", "ppc64");
+    DO_TEST_CAPS_ARCH_LATEST("powernv8-two-sockets", "ppc64");
 
     DO_TEST("pseries-basic",
             QEMU_CAPS_DEVICE_SPAPR_PCI_HOST_BRIDGE,
diff --git a/tests/qemuxml2xmloutdata/powernv8-two-sockets.ppc64-latest.xml b/tests/qemuxml2xmloutdata/powernv8-two-sockets.ppc64-latest.xml
new file mode 100644
index 0000000000..5d48b79b9f
--- /dev/null
+++ b/tests/qemuxml2xmloutdata/powernv8-two-sockets.ppc64-latest.xml
@@ -0,0 +1,39 @@
+<domain type='qemu'>
+  <name>QEMUGuest1</name>
+  <uuid>b20fcfe3-4a0a-4039-8735-9e024256e0f7</uuid>
+  <memory unit='KiB'>2097152</memory>
+  <currentMemory unit='KiB'>2097152</currentMemory>
+  <vcpu placement='static'>2</vcpu>
+  <os>
+    <type arch='ppc64' machine='powernv8'>hvm</type>
+    <boot dev='hd'/>
+  </os>
+  <cpu mode='custom' match='exact' check='none'>
+    <model fallback='forbid'>POWER8</model>
+    <topology sockets='2' dies='1' cores='1' threads='1'/>
+  </cpu>
+  <clock offset='utc'/>
+  <on_poweroff>destroy</on_poweroff>
+  <on_reboot>restart</on_reboot>
+  <on_crash>destroy</on_crash>
+  <devices>
+    <emulator>/usr/bin/qemu-system-ppc64</emulator>
+    <controller type='pci' index='0' model='pcie-root'>
+      <model name='pnv-phb3'/>
+      <target index='0' chip-id='0'/>
+    </controller>
+    <controller type='pci' index='1' model='pcie-root'>
+      <model name='pnv-phb3'/>
+      <target index='0' chip-id='1'/>
+    </controller>
+    <serial type='pty'>
+      <target type='isa-serial' port='0'>
+        <model name='isa-serial'/>
+      </target>
+    </serial>
+    <console type='pty'>
+      <target type='serial' port='0'/>
+    </console>
+    <audio id='1' type='none'/>
+  </devices>
+</domain>
diff --git a/tests/qemuxml2xmltest.c b/tests/qemuxml2xmltest.c
index 288e9698dc..4514b5a6b2 100644
--- a/tests/qemuxml2xmltest.c
+++ b/tests/qemuxml2xmltest.c
@@ -664,6 +664,7 @@ mymain(void)
 
     DO_TEST_CAPS_ARCH_LATEST("powernv8-basic", "ppc64");
     DO_TEST_CAPS_ARCH_LATEST("powernv8-root-port", "ppc64");
+    DO_TEST_CAPS_ARCH_LATEST("powernv8-two-sockets", "ppc64");
 
     DO_TEST("pseries-nvram",
             QEMU_CAPS_DEVICE_SPAPR_PCI_HOST_BRIDGE,
-- 
2.35.1




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