These devices must have unique targetIndex/chip-id pairs. Signed-off-by: Daniel Henrique Barboza <danielhb413@xxxxxxxxx> --- src/conf/domain_conf.c | 35 +++++++++++++++++++ tests/qemuxml2argvdata/powernv8-dupPHBs.err | 1 + .../powernv8-dupPHBs.ppc64-latest.err | 1 + tests/qemuxml2argvdata/powernv8-dupPHBs.xml | 27 ++++++++++++++ tests/qemuxml2argvtest.c | 1 + 5 files changed, 65 insertions(+) create mode 100644 tests/qemuxml2argvdata/powernv8-dupPHBs.err create mode 100644 tests/qemuxml2argvdata/powernv8-dupPHBs.ppc64-latest.err create mode 100644 tests/qemuxml2argvdata/powernv8-dupPHBs.xml diff --git a/src/conf/domain_conf.c b/src/conf/domain_conf.c index 026d801682..d27aafd771 100644 --- a/src/conf/domain_conf.c +++ b/src/conf/domain_conf.c @@ -2482,6 +2482,33 @@ virDomainControllerIsPowerNVRootPort(const virDomainControllerDef *cont) } +/* Caller must ensure that 'cont' is a PowerNV PHB device */ +static bool +virDomainControllerDuplicatedPHB(virDomainDef *def, + virDomainControllerDef *cont) +{ + int chipId = cont->opts.pciopts.chipId; + int targetIndex = cont->opts.pciopts.targetIndex; + size_t i; + + for (i = 0; i < def->ncontrollers; i++) { + virDomainControllerDef *cont2 = def->controllers[i]; + + if (!virDomainControllerIsPowerNVPHB(cont2)) + continue; + + if (cont2 == cont) + continue; + + if (cont2->opts.pciopts.chipId == chipId && + cont2->opts.pciopts.targetIndex == targetIndex) + return true; + } + + return false; +} + + virDomainFSDef * virDomainFSDefNew(virDomainXMLOption *xmlopt) { @@ -4738,6 +4765,14 @@ virDomainDefRejectDuplicateControllers(virDomainDef *def) cont->idx); goto cleanup; } + + if (virDomainControllerIsPowerNVPHB(cont) && + virDomainControllerDuplicatedPHB(def, cont)) { + virReportError(VIR_ERR_XML_ERROR, "%s", + _("Multiple pnv-phb controllers with same chip-id and index")); + goto cleanup; + } + ignore_value(virBitmapSetBit(bitmaps[cont->type], cont->idx)); } diff --git a/tests/qemuxml2argvdata/powernv8-dupPHBs.err b/tests/qemuxml2argvdata/powernv8-dupPHBs.err new file mode 100644 index 0000000000..bc5879640d --- /dev/null +++ b/tests/qemuxml2argvdata/powernv8-dupPHBs.err @@ -0,0 +1 @@ +XML error: Multiple pnv-phb controllers with same chip-id and index diff --git a/tests/qemuxml2argvdata/powernv8-dupPHBs.ppc64-latest.err b/tests/qemuxml2argvdata/powernv8-dupPHBs.ppc64-latest.err new file mode 100644 index 0000000000..bc5879640d --- /dev/null +++ b/tests/qemuxml2argvdata/powernv8-dupPHBs.ppc64-latest.err @@ -0,0 +1 @@ +XML error: Multiple pnv-phb controllers with same chip-id and index diff --git a/tests/qemuxml2argvdata/powernv8-dupPHBs.xml b/tests/qemuxml2argvdata/powernv8-dupPHBs.xml new file mode 100644 index 0000000000..43ee3051eb --- /dev/null +++ b/tests/qemuxml2argvdata/powernv8-dupPHBs.xml @@ -0,0 +1,27 @@ +<domain type='qemu'> + <name>QEMUGuest1</name> + <uuid>b20fcfe3-4a0a-4039-8735-9e024256e0f7</uuid> + <memory unit='KiB'>2097152</memory> + <vcpu placement='static'>1</vcpu> + <os> + <type arch='ppc64' machine='powernv8'>hvm</type> + </os> + <devices> + <emulator>/usr/bin/qemu-system-ppc64</emulator> + <controller type='pci' index='0' model='pcie-root'> + <model name='pnv-phb3'/> + <target index='0' chip-id='0'/> + </controller> + <controller type='pci' index='1' model='pcie-root'> + <model name='pnv-phb3'/> + <target index='1' chip-id='0'/> + </controller> + <controller type='pci' index='2' model='pcie-root'> + <model name='pnv-phb3'/> + <target index='1' chip-id='0'/> + </controller> + <console type='pty'> + <target type='serial' port='0'/> + </console> + </devices> +</domain> diff --git a/tests/qemuxml2argvtest.c b/tests/qemuxml2argvtest.c index 313d082d46..1ca0fd4633 100644 --- a/tests/qemuxml2argvtest.c +++ b/tests/qemuxml2argvtest.c @@ -2245,6 +2245,7 @@ mymain(void) DO_TEST_CAPS_ARCH_LATEST("powernv8-basic", "ppc64"); DO_TEST_CAPS_ARCH_LATEST("powernv8-root-port", "ppc64"); DO_TEST_CAPS_ARCH_LATEST("powernv8-two-sockets", "ppc64"); + DO_TEST_CAPS_ARCH_LATEST_PARSE_ERROR("powernv8-dupPHBs", "ppc64"); DO_TEST("pseries-basic", QEMU_CAPS_DEVICE_SPAPR_PCI_HOST_BRIDGE, -- 2.34.1