RE: [PATCH v2 10/12] target/riscv: Add kvm_riscv_get/put_regs_timer

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> -----Original Message-----
> From: Richard Henderson [mailto:richard.henderson@xxxxxxxxxx]
> Sent: Monday, December 13, 2021 11:20 PM
> To: Anup Patel <anup@xxxxxxxxxxxxxx>; Jiangyifei <jiangyifei@xxxxxxxxxx>
> Cc: Bin Meng <bin.meng@xxxxxxxxxxxxx>; open list:RISC-V
> <qemu-riscv@xxxxxxxxxx>; limingwang (A) <limingwang@xxxxxxxxxx>; KVM
> General <kvm@xxxxxxxxxxxxxxx>; libvir-list@xxxxxxxxxx; Anup Patel
> <anup.patel@xxxxxxx>; QEMU Developers <qemu-devel@xxxxxxxxxx>;
> wanbo (G) <wanbo13@xxxxxxxxxx>; Palmer Dabbelt <palmer@xxxxxxxxxxx>;
> kvm-riscv@xxxxxxxxxxxxxxxxxxx; Wanghaibin (D)
> <wanghaibin.wang@xxxxxxxxxx>; Alistair Francis
> <Alistair.Francis@xxxxxxx>; Fanliang (EulerOS) <fanliang@xxxxxxxxxx>;
> Wubin (H) <wu.wubin@xxxxxxxxxx>
> Subject: Re: [PATCH v2 10/12] target/riscv: Add kvm_riscv_get/put_regs_timer
> 
> On 12/12/21 9:05 PM, Anup Patel wrote:
> >> +    ret = kvm_get_one_reg(cs, RISCV_TIMER_REG(env, state), &reg);
> >> +    if (ret) {
> >> +        abort();
> >> +    }
> >> +    env->kvm_timer_state = reg;
> >
> > Please read the timer frequency here.
> 
> Yep.
> 
> >> +
> >> +    env->kvm_timer_dirty = true;
> >> +}
> >> +
> >> +static void kvm_riscv_put_regs_timer(CPUState *cs) {
> >> +    int ret;
> >> +    uint64_t reg;
> >> +    CPURISCVState *env = &RISCV_CPU(cs)->env;
> >> +
> >> +    if (!env->kvm_timer_dirty) {
> >> +        return;
> >> +    }
> >
> > Over here, we should get the timer frequency and abort() with an error
> > message if it does not match env->kvm_timer_frequency
> >
> > For now, migration will not work between Hosts with different timer
> > frequency.
> 
> You shouldn't have to do this every "put", only on migration, at which point you
> can actually signal a migration error rather than aborting directly.
> 
> 
> r~

Yes, it will be modified in the next series.

Yifei




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