Signed-off-by: Jiri Denemark <jdenemar@xxxxxxxxxx> --- src/cpu/cpu_x86.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c index 3b3a428ecd..7bd19a1676 100644 --- a/src/cpu/cpu_x86.c +++ b/src/cpu/cpu_x86.c @@ -2641,18 +2641,18 @@ static int virCPUx86GetHost(virCPUDefPtr cpu, virDomainCapsCPUModelsPtr models) { - virCPUDataPtr cpuData = NULL; - int ret = -1; + g_autoptr(virCPUData) cpuData = NULL; + int ret; if (virCPUx86DriverInitialize() < 0) - goto cleanup; + return -1; if (!(cpuData = virCPUDataNew(archs[0]))) - goto cleanup; + return -1; if (cpuidSet(CPUX86_BASIC, cpuData) < 0 || cpuidSet(CPUX86_EXTENDED, cpuData) < 0) - goto cleanup; + return -1; /* Read the IA32_ARCH_CAPABILITIES MSR (0x10a) if supported. * This is best effort since there might be no way to read the MSR @@ -2672,7 +2672,7 @@ virCPUx86GetHost(virCPUDefPtr cpu, }; if (virCPUx86DataAdd(cpuData, &item) < 0) - goto cleanup; + return -1; } } @@ -2688,8 +2688,6 @@ virCPUx86GetHost(virCPUDefPtr cpu, VIR_DEBUG("Host CPU does not support invariant TSC"); } - cleanup: - virCPUx86DataFree(cpuData); return ret; } #endif -- 2.26.0